tychovrahe
|
e8eb48cd0d
|
chore(core): add T3W1 production keys vendorheaders
[no changelog]
|
2025-01-23 15:42:56 +01:00 |
|
tychovrahe
|
885c5b96d9
|
refactor(core/rust): move bindgen macros used for tests to model folder
[no changelog]
|
2025-01-23 10:22:00 +01:00 |
|
tychovrahe
|
bdc054235c
|
refactor(core): define model-specific include files in site-scons
[no changelog]
|
2025-01-23 10:22:00 +01:00 |
|
tychovrahe
|
26bde15429
|
refactor(core): extract model specific definitions from Makefile
[no changelog]
|
2025-01-23 10:22:00 +01:00 |
|
Martin Milata
|
ae853bb821
|
Merge branch 'release/25.01'
|
2025-01-22 12:14:10 +01:00 |
|
tychovrahe
|
8207b9ffe5
|
feat(core): add BLE to t3w1 board
[no changelog]
|
2025-01-14 09:15:12 +01:00 |
|
cepetr
|
47f618c640
|
feat(core): decrease t3w1 backlight pwm frequency
[no changelog]
|
2025-01-14 07:52:15 +01:00 |
|
cepetr
|
7a603b8717
|
feat(core): improve haptic driver peripherals init/deinit
[no changelog]
|
2025-01-14 07:52:15 +01:00 |
|
cepetr
|
a881401e4d
|
feat(core): improve pwm backlight driver peripherals init/deinit
[no changelog]
|
2025-01-14 07:52:15 +01:00 |
|
Martin Milata
|
dadff32f39
|
build(core): use internal model names everywhere
TREZOR_MODEL=T and TREZOR_MODEL=R
no longer work, please use
TREZOR_MODEL=T2T1 and TREZOR_MODEL=T2B1
[no changelog]
|
2025-01-13 16:24:35 +01:00 |
|
tychovrahe
|
22ab7e98f5
|
perf(core): optimize LTDC-DSI ram usage by properly utilizing LTDC window
[no changelog]
|
2025-01-06 11:42:40 +01:00 |
|
tychovrahe
|
1c59442f89
|
feat(core): use lx250a2401a display panel on T3W1
[no changelog]
|
2025-01-06 11:42:40 +01:00 |
|
tychovrahe
|
b97390a73a
|
refactor(core): make display resolution constants global, board specific
[no changelog]
|
2025-01-06 11:42:40 +01:00 |
|
tychovrahe
|
33bb7ef410
|
fix(core): increase framebuffer section size on U5G models
[no changelog]
|
2025-01-06 11:42:40 +01:00 |
|
Martin Milata
|
8a254aa8ea
|
chore(core): add signed bootloader 2.1.8 for T2T1, T2B1
|
2025-01-03 19:47:34 +01:00 |
|
tychovrahe
|
c26d9f4227
|
chore(core): increase size of assets area for U5G models
[no changelog]
|
2025-01-02 11:42:00 +01:00 |
|
tychovrahe
|
3bc13b5707
|
refactor(core): switch DISC2 display driver to universal LTDC DSI implementation
[no changelog]
|
2024-12-13 17:24:03 +01:00 |
|
tychovrahe
|
03a296f815
|
feat(core): display driver for T3W1
[no changelog]
|
2024-12-13 17:24:03 +01:00 |
|
tychovrahe
|
0bc729a3da
|
refactor(core): streamline RAM layout
[no changelog]
|
2024-12-11 21:41:52 +01:00 |
|
cepetr
|
e456e2ad27
|
feat(core): add power button wakeup functionality
[no changelog]
|
2024-12-11 14:45:16 +01:00 |
|
cepetr
|
97dbf2fab3
|
feat(core): introduce stwlc38 driver
[no changelog]
|
2024-12-11 14:45:16 +01:00 |
|
tychovrahe
|
8f4268229a
|
feat(core): use SMPS on T3W1
[no changelog]
|
2024-12-02 15:06:32 +01:00 |
|
tychovrahe
|
a7f6930c78
|
feat(core): add support for haptics on T3W1
[no changelog]
|
2024-11-20 20:01:52 +01:00 |
|
tychovrahe
|
70b9746dc5
|
feat(core): support powering up optiga on T3T1 rev. G and T3B1 rev. C PCBs
[no changelog]
|
2024-11-20 20:01:29 +01:00 |
|
tychovrahe
|
b0dd521c5d
|
fix(core): separate bootargs from kernel/aux SRAM
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
0f0f54f185
|
feat(core): support optiga on T3W1
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
c5b3dd72b9
|
feat(core): add support for SBU on T3W1
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
40c5426717
|
fix(core): fix MPU kernel sram setting for STM32U5G
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
b4c95f4c16
|
fix(core): fix systick frequency computation by utilizing HSE_VALUE properly
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
10687e8fa0
|
feat(core): add power button to T3W1 board rev A
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
cepetr
|
089db2cadf
|
refactor(core): restructure embed folder
[no changelog]
|
2024-11-18 09:41:02 +01:00 |
|
Martin Milata
|
c101cdfcbe
|
Merge branch 'release/24.11.01'
|
2024-11-15 18:37:16 +01:00 |
|
tychovrahe
|
4d4ab93197
|
chore(core): remove residual DISPLAY_LEGACY_HEADER constant from boards
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
aac3559453
|
chore(core): move storage sectors to end of flash on U5G models
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
fa953d7296
|
chore(core): switch T3W1 support to U5
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
5c101ab800
|
feat(core): switch DISC2 to use newer U5G variant
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
5894c34f58
|
feat(core): adjust flash layout on DISC2
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
0d3af6a96a
|
fix(core): fix firmware hashing on U5
[no changelog]
|
2024-11-12 12:55:36 +01:00 |
|
tychovrahe
|
435fbd6e8c
|
feat(core): add power button to button driver
[no changelog]
|
2024-11-07 08:48:21 +01:00 |
|
cepetr
|
7b6f444751
|
refactor(core): introduce global trezor_rtl/bsp/model headers
[no changelog]
|
2024-11-05 10:00:31 +01:00 |
|
cepetr
|
c997201754
|
refactor(core): simplify ensure_compatible_settings
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
80a67c647f
|
refactor(core): relocate display resolution to model.h
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
bba94ab1f6
|
refactor(core): remove redundant TREZOR_FONT_BPP
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
cb2c85dc2e
|
refactor(core): remove unused MAX_DISPLAY_RESx
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
Martin Milata
|
1dfaae6080
|
chore(core): add signed bootloader 2.1.9 for T3T1
|
2024-11-04 12:17:31 +01:00 |
|
tychovrahe
|
d38c2e1790
|
chore(core): drop obsolete boards
[no changelog]
|
2024-10-31 10:27:08 +01:00 |
|
tychovrahe
|
42396dd007
|
refactor(core): make USE_xxx defines global
[no changelog]
|
2024-10-31 10:27:08 +01:00 |
|
cepetr
|
a747210f54
|
fix(core): fix secret & assets start address const
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
059152d9b4
|
fix(core): fix BHK_MAXSIZE constant
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
7bd3663930
|
fix(core): align coreapp start to 8KB (u5 only)
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|