tychovrahe 70b9746dc5 feat(core): support powering up optiga on T3T1 rev. G and T3B1 rev. C PCBs ... [no changelog]		2024-11-20 20:01:29 +01:00
..
D001	fix(core): fix systick frequency computation by utilizing HSE_VALUE properly	2024-11-20 11:17:35 +01:00
D002	fix(core): separate bootargs from kernel/aux SRAM	2024-11-20 11:17:35 +01:00
T2B1	feat(core): add support for SBU on T3W1	2024-11-20 11:17:35 +01:00
T2T1	feat(core): add support for SBU on T3W1	2024-11-20 11:17:35 +01:00
T3B1	feat(core): support powering up optiga on T3T1 rev. G and T3B1 rev. C PCBs	2024-11-20 20:01:29 +01:00
T3T1	feat(core): support powering up optiga on T3T1 rev. G and T3B1 rev. C PCBs	2024-11-20 20:01:29 +01:00
T3W1	fix(core): separate bootargs from kernel/aux SRAM	2024-11-20 11:17:35 +01:00
model_version.h	feat(core): add support for T3W1, on F4	2024-10-09 15:06:40 +02:00
otp_layout.h	refactor(core): restructure embed folder	2024-11-18 09:41:02 +01:00
trezor_model.h	refactor(core): restructure embed folder	2024-11-18 09:41:02 +01:00