arno/bddisasm
1
0
Fork 0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-12-27 08:28:07 +00:00
Code Issues Releases Wiki Activity
205 Commits 3 Branches 16 Tags 8.6 MiB
fe6a937f51
Commit Graph

32 Commits

Author SHA1 Message Date
BITDEFENDER\vlutas
7749e06b9d Removed ND_CAT_FRED. 2021-11-02 11:30:11 +02:00
Andrei Vlad LUTAS
76d92e73c2 Multiple changes 
- Add support for AVX512-FP16 instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
- Bug fix: zeroing with no masking is not supported, so return an error if we encounter such encodings
- Bug fix: ignore VEX/EVEX.W field outside 64 bit mode for some instructions
- Several other minor fixes and improvements
 2021-07-08 12:40:39 +03:00
Ionel-Cristinel ANICHITEI
e7803bdf72 Implement nd_vsnprintf_s and nd_memset if possible 2021-03-30 21:58:03 +03:00
Ionel-Cristinel ANICHITEI
dbbc8b82af cmake: Space between if/else/elseif and condition 
It just looks better IMO
 2021-03-30 12:36:35 +03:00
Ionel-Cristinel ANICHITEI
283c00b4c7 cmake: Format the cmake scripts 2021-03-30 12:20:47 +03:00
Ionel-Cristinel ANICHITEI
3495a7cc84 cmake: Various improvements, especially to the way the bddisasm package is consumed 
This should make integrating the project easier. CMake also works on Windows now.
 2021-03-30 12:20:31 +03:00
Andrei Vlad LUTAS
fccf11915d Added support for Intel FRED and LKGS instructions. 2021-03-15 14:05:44 +02:00
Andrei Vlad LUTAS
f8a3011a49 Added support for AESDEC, AESDECLAST and AESIMC emulation, using compiler intrinsics - they will be used only if the SHEMU_OPT_SUPPORT_AES is set (so the integrator can properly check for AES-NI support in hardware). 
Fixed shemu option on Linux - make sure proper RIP is provided.
 2020-12-04 10:52:56 +02:00
Ionel-Cristinel ANICHITEI
3c6679f927 disasmtool_lix: Remove inc/bdshemu from include directories 2020-11-20 16:32:34 +02:00
Ionel-Cristinel ANICHITEI
9fc3070436 Merge remote-tracking branch 'bitdefender-public/master' 2020-11-20 16:30:08 +02:00
Ionel-Cristinel ANICHITEI
80a1fd54ef disasmtool_lix: Use -march=nehalem when building 2020-11-20 16:25:25 +02:00
Andrei Vlad LUTAS
cd27b55b61 Fixed conflicts. 2020-11-20 16:10:31 +02:00
Andrei Vlad LUTAS
5aa353867c Add support for shemu in disasmtool_lix (thanks to Bogdan Bosinta - @bbosinta). 2020-11-20 16:06:14 +02:00
Bogdan-Viorel BOSINTA
1fd35e9f30 Include disasmtool in packages 2020-11-20 15:01:17 +02:00
Bogdan-Viorel BOSINTA
704e452353 Cleanup CMakeLists.txt 2020-11-20 15:01:16 +02:00
Ionel-Cristinel ANICHITEI
c1c3770cc6 Move bdhsemu.h to inc/ 2020-11-17 16:05:40 +02:00
Andrei Vlad LUTAS
460e544652 Fixed build. 2020-11-09 09:52:49 +02:00
Andrei Vlad LUTAS
58197cc518 Removed support for PCOMMIT and CL1INVMB (not implemented by any x86/x64 CPUs), and marked MOV to/from test registers as being invalid in long mode. 
Fixed https://github.com/bitdefender/bddisasm/issues/24
Fixed https://github.com/bitdefender/bddisasm/issues/25
Fixed https://github.com/bitdefender/bddisasm/issues/26
 2020-11-09 09:18:46 +02:00
Andrei Vlad LUTAS
9652450125 Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
Andrei Vlad LUTAS
24ae7782d6 Fixed some static code check warnings. 2020-09-21 12:16:45 +03:00
Andrei Vlad LUTAS
4f8b030ddd Added support for Intel Key Locker instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-key-locker-specification.html. 2020-09-16 11:56:05 +03:00
Andrei Vlad LUTAS
33078e4670 Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
Andrei KISARI
a78814c19c Updated the 'argparse' header. 2020-08-06 10:14:12 +03:00
Andrei Vlad LUTAS
144baa5140 Renamed REG_* fields to NDR_*, so that we don't conflict with _GNU_SOURCES. 2020-07-29 11:05:27 +03:00
Cristian-Bogdan SIRB
2868b2afde disasmtool_lix: Added the --extended parameter which shows the instructions info 2020-07-28 16:14:28 +03:00
Cristian-Bogdan SIRB
75702e9f0d disasmtool_lix: Align the address part to the biggest one 
This way, it will always be aligned when dumping instructions:

  0 50    PUSH rax
...
 10 50    PUSH rax
...
100 50    PUSH rax
 2020-07-28 16:05:53 +03:00
Cristian-Bogdan SIRB
daa0d403a1 Fix the disasmtool_lix build 
The build wasn't checking properly for the compiler (was checking for C, but
this is a CPP project).
Also added a few more compiler options for GCC 9 and Clang 10.
 2020-07-28 15:15:53 +03:00
Ionel-Cristinel ANICHITEI
087ffbcf95 disasmtool_lix: Add missing instructions to ins_class_to_str 2020-07-23 15:54:05 +03:00
Andrei Vlad LUTAS
752bc626c4 Fixed RET with immediate - the immediate is not sign-extended. 
Fixed VEX decoding in 32 bit mode - vex.vvvv bit 3 is simply ignored.
Fixed several FMA instructions decoding (L/W flag should be ignored).
Print the 64 bit immediate value in disassembly, instead of the raw immediate (note that the operand always contains the sign-extended, full immediate).
XBEGIN always uses 32/64 bit RIP size (0x66 does not affect its size).
Decode WBINVD even if it's preceded by 0x66/0xF2 prefixes.
Several mnemonic fixes (FXSAVE64, FXRSTOR64, PUSHA/PUSHAD...).
Properly decode VPERMIL2* instructions.
Fixed SSE register decoding when it is encoded in immediate.
Decode SCATTER instructions even though they use the VSIB index as source.
Some disp8 fixes (t1s -> t1s8/t1s16).
SYSCALL/SYSRET are decoded and executed in 32 bit compat modem, even though SDM states they are invalid.
RDPID uses 32/64 bit reg size, never 16.
Various other minor tweaks & fixes.
Re-generated the test files, and added some more, new tests.
 2020-07-23 14:08:01 +03:00
Andrei Vlad LUTAS
960e9eaeee disasmtool_lix dumper fix - dump cet_ss and cet_ibt. 2020-07-22 09:32:18 +03:00
Charles Paulet
f936d0c020 Fix disasmtool_lix no_color option 2020-07-21 22:13:05 +02:00
Andrei Vlad LUTAS
698ba367a1 Initial commit. 2020-07-21 11:19:18 +03:00