ee6cdd6cb6Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
master
BITDEFENDER\vlutas
2023-02-09 10:54:45 +0200
24665b0531Switched from nil to n/a naming for absent operands, as it is more obvious.
BITDEFENDER\vlutas
2023-02-08 17:44:45 +0200
0093439855Added some comments.
BITDEFENDER\vlutas
2023-02-02 22:10:56 +0200
089e6d5e7eSignificant cleanup in disasmtool: the obsolete search functionality, and supplying registers for shemu from a file are no longer supported.
BITDEFENDER\vlutas
2023-02-02 21:46:24 +0200
61382e95f0Since all the shemu test file are synthetic and clean, I removed the password from the test archive.
BITDEFENDER\vlutas
2022-12-16 15:17:39 +0200
9ba1e6a2f9Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. Multiple minor fixes to existing instructions. Moved x86 decoding tests in a separate directory & improved the test script.
BITDEFENDER\vlutas
2022-10-04 12:22:59 +0300
4596dbda51Add copyright info when auto-generating files.
BITDEFENDER\vlutas
2022-09-10 23:15:00 +0300
b109990ba2Removed some unneeded code.
BITDEFENDER\vlutas
2022-08-09 20:15:30 +0300
47da322ea5Improved upper bits handling for SSE/AVX operations. Improved POPF handling when 16 bit operand size is used. Fixed typo in PUNPCKLBW emulation.
BITDEFENDER\vlutas
2022-08-09 20:02:45 +0300
2fc491d51dHandle reserved bits in RFLAGS when setting the entire register value.
BITDEFENDER\vlutas
2022-08-08 12:02:00 +0300
d3fd900903Fixed OF on SHL and SHR with one bit shifts.
BITDEFENDER\vlutas
2022-08-01 14:13:27 +0300
bf81c647e3Make sure all flags are set for CMPXCHG (this was left intentionally incomplete). Make sure we clear upper bits of the 256/512 bit SSE register.
BITDEFENDER\vlutas
2022-07-19 11:03:17 +0300
6dda2c122cMake sure upper 32 bit of a CMOV destination register is cleared to 0 even if the condition is not satisfied
BITDEFENDER\vlutas
2022-07-16 12:21:46 +0300
1805a9edecFixed flag setting for ADC, SBB, SAR and IMUL instructions.
BITDEFENDER\vlutas
2022-07-14 13:42:37 +0300
2f50ce9b4eImproved REG_ID macros - make sure we include block addressing and High8 designator in the reg ID. Alsom, make sure the register size fits in, since the new tile register can be 1K in size, which previously overflowed...
BITDEFENDER\vlutas
2021-12-03 12:44:57 +0200
4ff620cb76Added bdhelpers to CMake.
BITDEFENDER\vlutas
2021-11-03 09:34:04 +0200
433e723e07Implemented a reverse oprand lookup table. It holds pointers to relevant operands inside INSTRUX, for quick lookup. Moved helper functions in bdhelpers.c. Added a dedicated BranchInfo field inside INSTRUX, containing the most relevant branch information.
BITDEFENDER\vlutas
2021-11-02 11:22:22 +0200
412f065965Moved the formatting function in a dedicated source file. Added support for SIDT and RDTSC in bdshemu.
BITDEFENDER\vlutas
2021-10-19 17:33:15 +0300
38592edf31Removed old test files.
Andrei Vlad LUTAS
2021-08-31 13:49:29 +0300
08096172ccMultiple improvements - New shemu flag - SHEMU_FLAG_SIDT, set when sheu encounters a SIDT in ring0. - Added the CET Tracked flag to SYSCLAL, SYSENTER and INT n instructions. - Fixed Do Not Track prefix recognition for CALL and JMP in long-mode. - Fixed MONITOR and MONITORX implicit operands - the rAX register encodes a virtual address that will be used as the monitored range. That address is subject to a 1 byte load. - Fixed RMPADJUST and RMPUPDATE implicit operands - the rAX register encodes a virtual address, and the rCX register encodes a virtual address of the RMP updated entry.
v1.34.4
Andrei Vlad LUTAS
2021-08-31 13:37:50 +0300
5a617986b7Added new shemu flag: SHEMU_FLAG_SUD_ACCESS is raised whenever the code accesses the SharedUserData page.
v1.34.2
Andrei Vlad LUTAS
2021-08-16 12:34:41 +0300
c8735b437aFixed NEG emulation - make sure flags are set.
Andrei Vlad LUTAS
2021-08-10 14:46:39 +0300
f6050661d5Multiple improvements in bdshemu Fixed an emulation bug for MOVZX and MOVSX instructions (https://github.com/bitdefender/bddisasm/issues/48) New shellcode flag - call tot Wow32 reserved. New shellcode flag - heaven's gate. New shellcode flag - stack-pivot. Moved bdshemu tests in a password protected zip file, so it doesn't trigger AV detections.
Andrei Vlad LUTAS
2021-08-10 11:43:51 +0300
c3a6ea1c25Updated SEAMCALL specs according to Intel® Trust Domain CPU Architectural Extensions 343754-002US May 2021.
Andrei Vlad LUTAS
2021-05-31 13:34:52 +0300
d053de409fAlthough not stated in the SDM, VMCALL, VMLAUNCH, VMRESUME and VMXOFF refuse any prefix (66, F3, F2).
Andrei Vlad LUTAS
2021-05-31 10:42:26 +0300
072f6e059bBuild improvements Exclude string constants from build if BDDISASM_NO_FORMAT is defined. Use extern "C" when declaring the public bddisasm/bdshemu functions. Include wmmintrin.h for AES intrinisics when building using LLVM/clang.
Andrei Vlad LUTAS
2021-05-17 09:52:04 +0300
10dc00681dUpdated version for pybddisasm build.
Andrei Vlad LUTAS
2021-05-17 09:13:27 +0300
f7bf814bbcFlag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write. Bypass self-writes option in bdshemu - if set, bdshemu will not proceed to commit modifications made by the shellcode to itself.
Andrei Vlad LUTAS
2021-05-17 09:04:34 +0300
283c00b4c7cmake: Format the cmake scripts
Ionel-Cristinel ANICHITEI
2021-03-30 12:20:47 +0300
3495a7cc84cmake: Various improvements, especially to the way the bddisasm package is consumed
Ionel-Cristinel ANICHITEI
2021-03-30 12:20:31 +0300
fccf11915dAdded support for Intel FRED and LKGS instructions.
Andrei Vlad LUTAS
2021-03-15 14:05:44 +0200
f7be5a7bbdIncremented version.
v1.31.8
Andrei Vlad LUTAS
2021-02-23 18:17:21 +0200
15e5e2db63Fixed several RFLAGS setting issues with airthmetic and shift instructions.
Andrei Vlad LUTAS
2021-02-23 18:11:40 +0200
37d47ef7e7Display instruction bitfields support. Using the `-bits` option, the various bits inside the EVEX, VEX, XOP, ModR/M and SIB can be displayed.
v1.31.7
Andrei Vlad LUTAS
2021-02-19 11:10:41 +0200