Commit Graph

  • 30d322a8e1
    Merge f7410a083a into 8f95a2828d #86 oberrich 2024-02-26 04:13:40 +0000
  • f7410a083a
    Fix typo in bdshemu.c #86 oberrich 2024-02-26 05:13:24 +0100
  • 8f95a2828d
    Merge pull request #85 from ianichitei/master master vlutas 2024-02-23 15:44:04 +0200
  • aeeafc414a
    build: Fix ci.yml #85 Anichitei Ionel-Cristinel 2024-02-23 12:22:18 +0200
  • afc3e94801
    build: Try to build on macos Anichitei Ionel-Cristinel 2024-02-23 12:21:11 +0200
  • 357b95d652
    build: Remove `rapidjson` dependency Anichitei Ionel-Cristinel 2024-02-23 12:16:08 +0200
  • 3beab3a3ee
    build: Use `-march=native` Anichitei Ionel-Cristinel 2024-02-23 11:44:03 +0200
  • 40d53c6433 Removed unused declaration. Andrei Vlad LUTAS 2024-02-22 15:03:15 +0200
  • 00a9640b73
    rsbddisasm: Update `bddisasm-sys` dependency version Anichitei Ionel-Cristinel 2024-02-21 08:04:25 +0200
  • abc9657c78
    rsbddisasm: Bump version in install instructions Anichitei Ionel-Cristinel 2024-02-21 08:02:20 +0200
  • b5ac0a30b9
    Update Cargo.toml Anichitei Ionel-Cristinel 2024-02-21 08:00:40 +0200
  • ba14104087
    rsbddisasm: Update `bindgen` to 0.62.0 v2.1.0 Anichitei Ionel-Cristinel 2024-02-20 14:46:59 +0200
  • 698686ab14 Update headers for pybddisasm. Andrei KISARI 2024-02-20 14:35:21 +0200
  • fbe5c1375d
    Update ci.yml Anichitei Ionel-Cristinel 2024-02-20 14:06:32 +0200
  • 570fa2bb62
    ci: Suppress cppcheck `objectIndex` warning Anichitei Ionel-Cristinel 2024-02-20 14:05:45 +0200
  • fad9c7e35c BDDISASM v2.1.0 release - please consult the CHANGELOG for details about the modifications. Andrei Vlad LUTAS 2024-02-20 13:39:22 +0200
  • 727c87ecc4 rsbddisasm: Update bindings Ionel-Cristinel ANICHITEI 2023-07-21 10:14:31 +0300
  • f53cbc51e2 Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE. Andrei Vlad LUTAS 2023-07-21 09:38:49 +0300
  • be0969824c rsbddisasm: Update CHANGELOG Ionel-Cristinel ANICHITEI 2023-07-01 10:50:49 +0300
  • fbb38f1518 #82: Handle 0 in `OpSize::from_raw` Ionel-Cristinel ANICHITEI 2023-07-01 10:44:37 +0300
  • 935e2dfe5b
    Merge pull request #81 from bitdefender/ci-updates Anichitei Ionel-Cristinel 2023-06-27 14:57:15 +0300
  • b90ed49d33
    ci: Update `setup-msbuild` to 1.3 #81 ci-updates Anichitei Ionel-Cristinel 2023-06-27 14:52:22 +0300
  • b71ad7e6d9
    ci: Update `upload-release-assets` to v2.0.2 Anichitei Ionel-Cristinel 2023-06-27 14:45:14 +0300
  • aa362fa43e
    ci: Update `checkout` to v3 Anichitei Ionel-Cristinel 2023-06-27 14:32:31 +0300
  • 11e6a3e208
    Merge pull request #80 from akisari/master Andrei KISARI 2023-06-26 11:42:01 +0300
  • 1384893052 Update copyright. #80 Andrei KISARI 2023-06-26 10:40:30 +0300
  • 455286ca13 Fix build. Andrei KISARI 2023-06-22 15:14:05 +0300
  • 4f182b2c11 Use SWIG to create bindings between C and Python. Andrei KISARI 2023-06-22 14:54:41 +0300
  • 096b583c25 Tiny comment fix. BITDEFENDER\vlutas 2023-06-02 11:22:52 +0300
  • f293c936ee Optimized ror/rol/rcr/rcl instruction emulation - don't use slow loops anymore. BITDEFENDER\vlutas 2023-06-01 21:28:30 +0300
  • b37f57ee7c Bug bounty test - please ignore.... (zkrhjw) #79 ljnuvure 2023-04-07 10:32:15 +0000
  • d16f1d8ba3 bdshemu_fuzz: Update build scripts v1.37.0 Ionel-Cristinel ANICHITEI 2023-04-05 11:06:10 +0300
  • 3beaac8ae2 Update bindings Ionel-Cristinel ANICHITEI 2023-04-05 10:02:41 +0300
  • 124521beb5 Added support for Intel AMX-COMPLEX instructions. BITDEFENDER\vlutas 2023-04-05 09:45:07 +0300
  • ee6cdd6cb6 Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon. BITDEFENDER\vlutas 2023-02-09 10:54:45 +0200
  • 24665b0531 Switched from nil to n/a naming for absent operands, as it is more obvious. BITDEFENDER\vlutas 2023-02-08 17:44:45 +0200
  • fc6059109d Improved comments & improved vector length specifiers. BITDEFENDER\vlutas 2023-02-04 12:02:05 +0200
  • 0093439855 Added some comments. BITDEFENDER\vlutas 2023-02-02 22:10:56 +0200
  • 089e6d5e7e Significant cleanup in disasmtool: the obsolete search functionality, and supplying registers for shemu from a file are no longer supported. BITDEFENDER\vlutas 2023-02-02 21:46:24 +0200
  • 61382e95f0 Since all the shemu test file are synthetic and clean, I removed the password from the test archive. BITDEFENDER\vlutas 2022-12-16 15:17:39 +0200
  • 102b43dd00
    Merge pull request #78 from ianichitei/master Anichitei Ionel-Cristinel 2022-12-05 14:25:25 +0100
  • 31457a0c02 Fix `clang-cl` and `mingw` builds #78 Ionel-Cristinel ANICHITEI 2022-12-05 11:41:38 +0200
  • e67584241b Revert "Fix `clang-cl` and `mingw` builds" Ionel-Cristinel ANICHITEI 2022-12-05 12:06:53 +0200
  • add871993f Fix `clang-cl` and `mingw` builds Ionel-Cristinel ANICHITEI 2022-12-05 11:41:38 +0200
  • ab3461fd06 Regenerated test archive. BITDEFENDER\vlutas 2022-12-05 11:25:39 +0200
  • 00c9ebc341 rsbddisasm: Add `RMPQUERY` Ionel-Cristinel ANICHITEI 2022-10-27 12:57:13 +0300
  • 7a254037b0 Added support for AMD RMPQUERY instruction. BITDEFENDER\vlutas 2022-10-27 12:37:02 +0300
  • f75e1e28cd bdshemu_fuzz: Build with `-maes` Ionel-Cristinel ANICHITEI 2022-10-04 13:31:02 +0300
  • 22d7c14c51 rsbddisasm: Update bindings Ionel-Cristinel ANICHITEI 2022-10-04 13:17:54 +0300
  • 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. Multiple minor fixes to existing instructions. Moved x86 decoding tests in a separate directory & improved the test script. BITDEFENDER\vlutas 2022-10-04 12:22:59 +0300
  • 4596dbda51 Add copyright info when auto-generating files. BITDEFENDER\vlutas 2022-09-10 23:15:00 +0300
  • b109990ba2 Removed some unneeded code. BITDEFENDER\vlutas 2022-08-09 20:15:30 +0300
  • 47da322ea5 Improved upper bits handling for SSE/AVX operations. Improved POPF handling when 16 bit operand size is used. Fixed typo in PUNPCKLBW emulation. BITDEFENDER\vlutas 2022-08-09 20:02:45 +0300
  • 2fc491d51d Handle reserved bits in RFLAGS when setting the entire register value. BITDEFENDER\vlutas 2022-08-08 12:02:00 +0300
  • f62c8a2238 https://github.com/bitdefender/bddisasm/issues/70 - fixed OF setting on ROR. BITDEFENDER\vlutas 2022-08-01 15:46:38 +0300
  • 9c6b5429c9 Fixed pybddisasm version. BITDEFENDER\vlutas 2022-08-01 14:17:07 +0300
  • d3fd900903 Fixed OF on SHL and SHR with one bit shifts. BITDEFENDER\vlutas 2022-08-01 14:13:27 +0300
  • bf81c647e3 Make sure all flags are set for CMPXCHG (this was left intentionally incomplete). Make sure we clear upper bits of the 256/512 bit SSE register. BITDEFENDER\vlutas 2022-07-19 11:03:17 +0300
  • 6dda2c122c Make sure upper 32 bit of a CMOV destination register is cleared to 0 even if the condition is not satisfied BITDEFENDER\vlutas 2022-07-16 12:21:46 +0300
  • 1805a9edec Fixed flag setting for ADC, SBB, SAR and IMUL instructions. BITDEFENDER\vlutas 2022-07-14 13:42:37 +0300
  • e930d49713
    Merge pull request #54 from ianichitei/master vlutas 2022-02-17 15:47:09 +0200
  • f900388260
    Update rust.yml #54 Anichitei Ionel-Cristinel 2022-02-17 11:37:15 +0200
  • 59255c4ea6
    Update ci.yml Anichitei Ionel-Cristinel 2022-02-17 11:33:26 +0200
  • 90820faba4
    ci: Setup Windows SDK 18362 Anichitei Ionel-Cristinel 2022-02-17 11:12:30 +0200
  • f0804645f3
    Update ci.yml Anichitei Ionel-Cristinel 2022-02-17 10:59:04 +0200
  • 4525860ec8
    Fix a typo in the install instructions Anichitei Ionel-Cristinel 2022-01-25 17:31:03 +0200
  • 73b7c4ea96 rsbddisasm: Fix `no-std` category Ionel-Cristinel ANICHITEI 2022-01-05 14:40:26 +0200
  • 21c584b436 rsbddisasm: Change version to 0.2.0 Ionel-Cristinel ANICHITEI 2022-01-05 14:31:30 +0200
  • 70db095765 Updates Rust binding to the latest version. Fixed build in disasmtool_lix. v1.34.10 BITDEFENDER\vlutas 2022-01-05 14:17:13 +0200
  • fe6a937f51 Switched to internally defined types. WRUSSD and WRUSSQ cannot be executed when CPL != 0. BITDEFENDER\vlutas 2022-01-05 14:03:13 +0200
  • 08103713b2
    Merge pull request #53 from ekilmer/fix-bddisasm-makefile Anichitei Ionel-Cristinel 2022-01-04 17:43:15 +0200
  • 68c7c4a066
    Add missing sources to Makefile for bddisasm #53 Eric Kilmer 2022-01-04 09:52:34 -0500
  • 63e3ee22a9 Fixed High8 handling in NdGetFullAccessMap. BITDEFENDER\vlutas 2022-01-03 12:25:35 +0200
  • c9d4dbca0f Added missing modifications. BITDEFENDER\vlutas 2021-12-03 12:53:22 +0200
  • 2f50ce9b4e Improved REG_ID macros - make sure we include block addressing and High8 designator in the reg ID. Alsom, make sure the register size fits in, since the new tile register can be 1K in size, which previously overflowed... BITDEFENDER\vlutas 2021-12-03 12:44:57 +0200
  • 4ff620cb76 Added bdhelpers to CMake. BITDEFENDER\vlutas 2021-11-03 09:34:04 +0200
  • dac2092c17
    Rust bindings: Remove `ND_CAT_FRED` v1.34.7 Anichitei Ionel-Cristinel 2021-11-02 11:39:41 +0200
  • 7572adaeba Fixed INSTRUX size in setup.py. BITDEFENDER\vlutas 2021-11-02 11:34:17 +0200
  • 7749e06b9d Removed ND_CAT_FRED. BITDEFENDER\vlutas 2021-11-02 11:30:11 +0200
  • 656916d92d Added missing paranthesis. BITDEFENDER\vlutas 2021-11-02 11:26:52 +0200
  • 433e723e07 Implemented a reverse oprand lookup table. It holds pointers to relevant operands inside INSTRUX, for quick lookup. Moved helper functions in bdhelpers.c. Added a dedicated BranchInfo field inside INSTRUX, containing the most relevant branch information. BITDEFENDER\vlutas 2021-11-02 11:22:22 +0200
  • def76f8633 rsbddisasm: Fix keywords Ionel-Cristinel ANICHITEI 2021-10-20 12:24:11 +0300
  • 1e78d15878 bddisasm-sys: Fix keywords Ionel-Cristinel ANICHITEI 2021-10-20 12:12:02 +0300
  • 62cdbdc068
    Merge pull request #52 from ianichitei/master vlutas 2021-10-20 11:59:02 +0300
  • 7d50c7edd5 Update README #52 Ionel-Cristinel ANICHITEI 2021-10-20 10:06:25 +0300
  • 584150cb44 Move rsbddisasm to the bindings directory Ionel-Cristinel ANICHITEI 2021-10-20 10:03:16 +0300
  • af3d23e3ff Move pybddisasm to the bindings directory Ionel-Cristinel ANICHITEI 2021-10-20 09:32:50 +0300
  • 146ebc55c5
    ci: Attempt to fix the Windows build Anichitei Ionel-Cristinel 2021-10-19 18:20:35 +0300
  • 5ea879a9a0
    ci: Fix `cargo fmt` step Anichitei Ionel-Cristinel 2021-10-19 18:15:51 +0300
  • b57bf183b1
    Add Rust workflow Anichitei Ionel-Cristinel 2021-10-19 18:06:35 +0300
  • 51dbf5fb0a Initial Rust bindings implementation Ionel-Cristinel ANICHITEI 2021-10-19 17:46:46 +0300
  • 4a485853b6 Fixed pybddisasm version. BITDEFENDER\vlutas 2021-10-19 17:37:43 +0300
  • 412f065965 Moved the formatting function in a dedicated source file. Added support for SIDT and RDTSC in bdshemu. BITDEFENDER\vlutas 2021-10-19 17:33:15 +0300
  • 38592edf31 Removed old test files. Andrei Vlad LUTAS 2021-08-31 13:49:29 +0300
  • 08096172cc Multiple improvements - New shemu flag - SHEMU_FLAG_SIDT, set when sheu encounters a SIDT in ring0. - Added the CET Tracked flag to SYSCLAL, SYSENTER and INT n instructions. - Fixed Do Not Track prefix recognition for CALL and JMP in long-mode. - Fixed MONITOR and MONITORX implicit operands - the rAX register encodes a virtual address that will be used as the monitored range. That address is subject to a 1 byte load. - Fixed RMPADJUST and RMPUPDATE implicit operands - the rAX register encodes a virtual address, and the rCX register encodes a virtual address of the RMP updated entry. v1.34.4 Andrei Vlad LUTAS 2021-08-31 13:37:50 +0300
  • 5a617986b7 Added new shemu flag: SHEMU_FLAG_SUD_ACCESS is raised whenever the code accesses the SharedUserData page. v1.34.2 Andrei Vlad LUTAS 2021-08-16 12:34:41 +0300
  • c8735b437a Fixed NEG emulation - make sure flags are set. Andrei Vlad LUTAS 2021-08-10 14:46:39 +0300
  • f6050661d5 Multiple improvements in bdshemu Fixed an emulation bug for MOVZX and MOVSX instructions (https://github.com/bitdefender/bddisasm/issues/48) New shellcode flag - call tot Wow32 reserved. New shellcode flag - heaven's gate. New shellcode flag - stack-pivot. Moved bdshemu tests in a password protected zip file, so it doesn't trigger AV detections. Andrei Vlad LUTAS 2021-08-10 11:43:51 +0300
  • 76d92e73c2 Multiple changes - Add support for AVX512-FP16 instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html - Bug fix: zeroing with no masking is not supported, so return an error if we encounter such encodings - Bug fix: ignore VEX/EVEX.W field outside 64 bit mode for some instructions - Several other minor fixes and improvements v1.33.0 Andrei Vlad LUTAS 2021-07-08 12:40:39 +0300
  • 5b8b67c596
    Add vcpkg install instructions Anichitei Ionel-Cristinel 2021-06-04 10:14:06 +0300