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Added support for Intel Key Locker instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-key-locker-specification.html.

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pull/21/head
Andrei Vlad LUTAS 4 years ago
parent fc62fc0b36
commit 4f8b030ddd
23 changed files with 8629 additions and 7800 deletions
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32
bddisasm/bddisasm.c
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@ -198,6 +198,13 @@ static const uint16_t gOperandMap[] =
ND_OPE_M, // ND_OPT_FPU_STX
ND_OPE_S, // ND_OPT_SSE_XMM0
ND_OPE_S, // ND_OPT_SSE_XMM1
ND_OPE_S, // ND_OPT_SSE_XMM2
ND_OPE_S, // ND_OPT_SSE_XMM3
ND_OPE_S, // ND_OPT_SSE_XMM4
ND_OPE_S, // ND_OPT_SSE_XMM5
ND_OPE_S, // ND_OPT_SSE_XMM6
ND_OPE_S, // ND_OPT_SSE_XMM7
ND_OPE_S, // ND_OPT_MEM_rBX_AL (as used by XLAT)
ND_OPE_S, // ND_OPT_MEM_rDI (as used by masked moves)
@ -1680,6 +1687,16 @@ NdParseOperand(
size = ND_SIZE_1KB;
break;
case ND_OPS_384:
// 384 bit Key Locker handle.
size = ND_SIZE_384BIT;
break;
case ND_OPS_512:
// 512 bit Key Locker handle.
size = ND_SIZE_512BIT;
break;
case ND_OPS_unknown:
size = ND_SIZE_UNKNOWN;
break;
@ -1873,11 +1890,18 @@ NdParseOperand(
break;
case ND_OPT_SSE_XMM0:
// Operand is the XMM0 register.
case ND_OPT_SSE_XMM1:
case ND_OPT_SSE_XMM2:
case ND_OPT_SSE_XMM3:
case ND_OPT_SSE_XMM4:
case ND_OPT_SSE_XMM5:
case ND_OPT_SSE_XMM6:
case ND_OPT_SSE_XMM7:
// Operand is a hard-coded XMM register.
operand->Type = ND_OP_REG;
operand->Info.Register.Type = ND_REG_SSE;
operand->Info.Register.Size = ND_SIZE_128BIT;
operand->Info.Register.Reg = 0;
operand->Info.Register.Reg = opt - ND_OPT_SSE_XMM0;
break;
// Special operands. These are always implicit, and can't be encoded inside the instruction.
@ -4682,6 +4706,10 @@ NdToText(
res = nd_strcat_s(Buffer, BufferSize, "ymmword ptr ");
RET_EQ(res, NULL, ND_STATUS_BUFFER_OVERFLOW);
break;
case 48:
res = nd_strcat_s(Buffer, BufferSize, "m384 ptr ");
RET_EQ(res, NULL, ND_STATUS_BUFFER_OVERFLOW);
break;
case 64:
res = nd_strcat_s(Buffer, BufferSize, "zmmword ptr ");
RET_EQ(res, NULL, ND_STATUS_BUFFER_OVERFLOW);

10324
bddisasm/include/instructions.h
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File diff suppressed because it is too large Load Diff

284
bddisasm/include/mnemonics.h
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@ -1,149 +1,151 @@
#ifndef MNEMONICS_H
#define MNEMONICS_H
const char *gMnemonics[1571] =
const char *gMnemonics[1582] =
{
"AAA", "AAD", "AAM", "AAS", "ADC", "ADCX", "ADD", "ADDPD", "ADDPS",
"ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX", "AESDEC", "AESDECLAST",
"AESENC", "AESENCLAST", "AESIMC", "AESKEYGENASSIST", "ALTINST",
"AND", "ANDN", "ANDNPD", "ANDNPS", "ANDPD", "ANDPS", "ARPL",
"BEXTR", "BLCFILL", "BLCI", "BLCIC", "BLCMSK", "BLCS", "BLENDPD",
"BLENDPS", "BLENDVPD", "BLENDVPS", "BLSFILL", "BLSI", "BLSIC",
"BLSMSK", "BLSR", "BNDCL", "BNDCN", "BNDCU", "BNDLDX", "BNDMK",
"BNDMOV", "BNDSTX", "BOUND", "BSF", "BSR", "BSWAP", "BT", "BTC",
"BTR", "BTS", "BZHI", "CALL", "CALLF", "CBW", "CDQ", "CDQE",
"CL1INVMB", "CLAC", "CLC", "CLD", "CLDEMOTE", "CLEVICT0", "CLEVICT1",
"CLFLUSH", "CLFLUSHOPT", "CLGI", "CLI", "CLRSSBSY", "CLTS", "CLWB",
"CLZERO", "CMC", "CMOVBE", "CMOVC", "CMOVL", "CMOVLE", "CMOVNBE",
"CMOVNC", "CMOVNL", "CMOVNLE", "CMOVNO", "CMOVNP", "CMOVNS",
"CMOVNZ", "CMOVO", "CMOVP", "CMOVS", "CMOVZ", "CMP", "CMPPD",
"CMPPS", "CMPSB", "CMPSD", "CMPSQ", "CMPSS", "CMPSW", "CMPXCHG",
"CMPXCHG16B", "CMPXCHG8B", "COMISD", "COMISS", "CPUID", "CPU_READ",
"CPU_WRITE", "CQO", "CRC32", "CVTDQ2PD", "CVTDQ2PS", "CVTPD2DQ",
"CVTPD2PI", "CVTPD2PS", "CVTPI2PD", "CVTPI2PS", "CVTPS2DQ", "CVTPS2PD",
"CVTPS2PI", "CVTSD2SI", "CVTSD2SS", "CVTSI2SD", "CVTSI2SS", "CVTSS2SD",
"CVTSS2SI", "CVTTPD2DQ", "CVTTPD2PI", "CVTTPS2DQ", "CVTTPS2PI",
"CVTTSD2SI", "CVTTSS2SI", "CWD", "CWDE", "DAA", "DAS", "DEC",
"DELAY", "DIV", "DIVPD", "DIVPS", "DIVSD", "DIVSS", "DMINT",
"DPPD", "DPPS", "EMMS", "ENCLS", "ENCLU", "ENCLV", "ENDBR32",
"ENDBR64", "ENQCMD", "ENQCMDS", "ENTER", "EXTRACTPS", "EXTRQ",
"F2XM1", "FABS", "FADD", "FADDP", "FBLD", "FBSTP", "FCHS", "FCMOVB",
"FCMOVBE", "FCMOVE", "FCMOVNB", "FCMOVNBE", "FCMOVNE", "FCMOVNU",
"FCMOVU", "FCOM", "FCOMI", "FCOMIP", "FCOMP", "FCOMPP", "FCOS",
"FDECSTP", "FDIV", "FDIVP", "FDIVR", "FDIVRP", "FEMMS", "FFREE",
"FFREEP", "FIADD", "FICOM", "FICOMP", "FIDIV", "FIDIVR", "FILD",
"FIMUL", "FINCSTP", "FIST", "FISTP", "FISTTP", "FISUB", "FISUBR",
"FLD", "FLD1", "FLDCW", "FLDENV", "FLDL2E", "FLDL2T", "FLDLG2",
"FLDLN2", "FLDPI", "FLDZ", "FMUL", "FMULP", "FNCLEX", "FNDISI",
"FNINIT", "FNOP", "FNSAVE", "FNSTCW", "FNSTENV", "FNSTSW", "FPATAN",
"FPREM", "FPREM1", "FPTAN", "FRINEAR", "FRNDINT", "FRSTOR", "FSCALE",
"FSIN", "FSINCOS", "FSQRT", "FST", "FSTDW", "FSTP", "FSTPNCE",
"FSTSG", "FSUB", "FSUBP", "FSUBR", "FSUBRP", "FTST", "FUCOM",
"FUCOMI", "FUCOMIP", "FUCOMP", "FUCOMPP", "FXAM", "FXCH", "FXRSTOR",
"FXRSTOR64", "FXSAVE", "FXSAVE64", "FXTRACT", "FYL2X", "FYL2XP1",
"GETSEC", "GF2P8AFFINEINVQB", "GF2P8AFFINEQB", "GF2P8MULB", "HADDPD",
"HADDPS", "HLT", "HSUBPD", "HSUBPS", "IDIV", "IMUL", "IN", "INC",
"INCSSPD", "INCSSPQ", "INSB", "INSD", "INSERTPS", "INSERTQ",
"INSW", "INT", "INT1", "INT3", "INTO", "INVD", "INVEPT", "INVLPG",
"INVLPGA", "INVLPGB", "INVPCID", "INVVPID", "IRETD", "IRETQ",
"IRETW", "JBE", "JC", "JCXZ", "JECXZ", "JL", "JLE", "JMP", "JMPE",
"JMPF", "JNBE", "JNC", "JNL", "JNLE", "JNO", "JNP", "JNS", "JNZ",
"JO", "JP", "JRCXZ", "JS", "JZ", "KADDB", "KADDD", "KADDQ", "KADDW",
"KANDB", "KANDD", "KANDNB", "KANDND", "KANDNQ", "KANDNW", "KANDQ",
"KANDW", "KMERGE2L1H", "KMERGE2L1L", "KMOVB", "KMOVD", "KMOVQ",
"KMOVW", "KNOTB", "KNOTD", "KNOTQ", "KNOTW", "KORB", "KORD",
"KORQ", "KORTESTB", "KORTESTD", "KORTESTQ", "KORTESTW", "KORW",
"KSHIFTLB", "KSHIFTLD", "KSHIFTLQ", "KSHIFTLW", "KSHIFTRB", "KSHIFTRD",
"KSHIFTRQ", "KSHIFTRW", "KTESTB", "KTESTD", "KTESTQ", "KTESTW",
"KUNPCKBW", "KUNPCKDQ", "KUNPCKWD", "KXNORB", "KXNORD", "KXNORQ",
"KXNORW", "KXORB", "KXORD", "KXORQ", "KXORW", "LAHF", "LAR",
"LDDQU", "LDMXCSR", "LDS", "LDTILECFG", "LEA", "LEAVE", "LES",
"LFENCE", "LFS", "LGDT", "LGS", "LIDT", "LLDT", "LLWPCB", "LMSW",
"LODSB", "LODSD", "LODSQ", "LODSW", "LOOP", "LOOPNZ", "LOOPZ",
"LSL", "LSS", "LTR", "LWPINS", "LWPVAL", "LZCNT", "MASKMOVDQU",
"MASKMOVQ", "MAXPD", "MAXPS", "MAXSD", "MAXSS", "MCOMMIT", "MFENCE",
"MINPD", "MINPS", "MINSD", "MINSS", "MONITOR", "MONITORX", "MONTMUL",
"MOV", "MOVAPD", "MOVAPS", "MOVBE", "MOVD", "MOVDDUP", "MOVDIR64B",
"MOVDIRI", "MOVDQ2Q", "MOVDQA", "MOVDQU", "MOVHLPS", "MOVHPD",
"MOVHPS", "MOVLHPS", "MOVLPD", "MOVLPS", "MOVMSKPD", "MOVMSKPS",
"MOVNTDQ", "MOVNTDQA", "MOVNTI", "MOVNTPD", "MOVNTPS", "MOVNTQ",
"MOVNTSD", "MOVNTSS", "MOVQ", "MOVQ2DQ", "MOVSB", "MOVSD", "MOVSHDUP",
"MOVSLDUP", "MOVSQ", "MOVSS", "MOVSW", "MOVSX", "MOVSXD", "MOVUPD",
"MOVUPS", "MOVZX", "MPSADBW", "MUL", "MULPD", "MULPS", "MULSD",
"MULSS", "MULX", "MWAIT", "MWAITX", "NEG", "NOP", "NOT", "OR",
"ORPD", "ORPS", "OUT", "OUTSB", "OUTSD", "OUTSW", "PABSB", "PABSD",
"PABSW", "PACKSSDW", "PACKSSWB", "PACKUSDW", "PACKUSWB", "PADDB",
"PADDD", "PADDQ", "PADDSB", "PADDSW", "PADDUSB", "PADDUSW", "PADDW",
"PALIGNR", "PAND", "PANDN", "PAUSE", "PAVGB", "PAVGUSB", "PAVGW",
"PBLENDVB", "PBLENDW", "PCLMULQDQ", "PCMPEQB", "PCMPEQD", "PCMPEQQ",
"PCMPEQW", "PCMPESTRI", "PCMPESTRM", "PCMPGTB", "PCMPGTD", "PCMPGTQ",
"PCMPGTW", "PCMPISTRI", "PCMPISTRM", "PCOMMIT", "PCONFIG", "PDEP",
"PEXT", "PEXTRB", "PEXTRD", "PEXTRQ", "PEXTRW", "PF2ID", "PF2IW",
"PFACC", "PFADD", "PFCMPEQ", "PFCMPGE", "PFCMPGT", "PFMAX", "PFMIN",
"PFMUL", "PFNACC", "PFPNACC", "PFRCP", "PFRCPIT1", "PFRCPIT2",
"PFRCPV", "PFRSQIT1", "PFRSQRT", "PFRSQRTV", "PFSUB", "PFSUBR",
"PHADDD", "PHADDSW", "PHADDW", "PHMINPOSUW", "PHSUBD", "PHSUBSW",
"PHSUBW", "PI2FD", "PI2FW", "PINSRB", "PINSRD", "PINSRQ", "PINSRW",
"PMADDUBSW", "PMADDWD", "PMAXSB", "PMAXSD", "PMAXSW", "PMAXUB",
"PMAXUD", "PMAXUW", "PMINSB", "PMINSD", "PMINSW", "PMINUB", "PMINUD",
"PMINUW", "PMOVMSKB", "PMOVSXBD", "PMOVSXBQ", "PMOVSXBW", "PMOVSXDQ",
"PMOVSXWD", "PMOVSXWQ", "PMOVZXBD", "PMOVZXBQ", "PMOVZXBW", "PMOVZXDQ",
"PMOVZXWD", "PMOVZXWQ", "PMULDQ", "PMULHRSW", "PMULHRW", "PMULHUW",
"PMULHW", "PMULLD", "PMULLW", "PMULUDQ", "POP", "POPA", "POPAD",
"POPCNT", "POPFD", "POPFQ", "POPFW", "POR", "PREFETCH", "PREFETCHE",
"PREFETCHM", "PREFETCHNTA", "PREFETCHT0", "PREFETCHT1", "PREFETCHT2",
"PREFETCHW", "PREFETCHWT1", "PSADBW", "PSHUFB", "PSHUFD", "PSHUFHW",
"PSHUFLW", "PSHUFW", "PSIGNB", "PSIGND", "PSIGNW", "PSLLD", "PSLLDQ",
"PSLLQ", "PSLLW", "PSMASH", "PSRAD", "PSRAW", "PSRLD", "PSRLDQ",
"PSRLQ", "PSRLW", "PSUBB", "PSUBD", "PSUBQ", "PSUBSB", "PSUBSW",
"PSUBUSB", "PSUBUSW", "PSUBW", "PSWAPD", "PTEST", "PTWRITE",
"PUNPCKHBW", "PUNPCKHDQ", "PUNPCKHQDQ", "PUNPCKHWD", "PUNPCKLBW",
"PUNPCKLDQ", "PUNPCKLQDQ", "PUNPCKLWD", "PUSH", "PUSHA", "PUSHAD",
"PUSHFD", "PUSHFQ", "PUSHFW", "PVALIDATE", "PXOR", "RCL", "RCPPS",
"RCPSS", "RCR", "RDFSBASE", "RDGSBASE", "RDMSR", "RDPID", "RDPKRU",
"RDPMC", "RDPRU", "RDRAND", "RDSEED", "RDSHR", "RDSSPD", "RDSSPQ",
"RDTSC", "RDTSCP", "RETF", "RETN", "RMPADJUST", "RMPUPDATE",
"ROL", "ROR", "RORX", "ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS",
"RSDC", "RSLDT", "RSM", "RSQRTPS", "RSQRTSS", "RSTORSSP", "RSTS",
"SAHF", "SAL", "SALC", "SAR", "SARX", "SAVEPREVSSP", "SBB", "SCASB",
"SCASD", "SCASQ", "SCASW", "SEAMCALL", "SEAMOPS", "SEAMRET",
"SERIALIZE", "SETBE", "SETC", "SETL", "SETLE", "SETNBE", "SETNC",
"SETNL", "SETNLE", "SETNO", "SETNP", "SETNS", "SETNZ", "SETO",
"SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE", "SGDT", "SHA1MSG1",
"SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1", "SHA256MSG2",
"SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD", "SHRX",
"SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB", "SMINT",
"SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS", "STAC",
"STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD", "STOSQ",
"STOSW", "STR", "STTILECFG", "SUB", "SUBPD", "SUBPS", "SUBSD",
"SUBSS", "SVDC", "SVLDT", "SVTS", "SWAPGS", "SYSCALL", "SYSENTER",
"SYSEXIT", "SYSRET", "T1MSKC", "TDCALL", "TDPBF16PS", "TDPBSSD",
"TDPBSUD", "TDPBUSD", "TDPBUUD", "TEST", "TILELOADD", "TILELOADDT1",
"TILERELEASE", "TILESTORED", "TILEZERO", "TLBSYNC", "TPAUSE",
"TZCNT", "TZMSK", "UCOMISD", "UCOMISS", "UD0", "UD1", "UD2",
"UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS", "UNPCKLPD", "UNPCKLPS",
"V4FMADDPS", "V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS", "VADDPD",
"VADDPS", "VADDSD", "VADDSS", "VADDSUBPD", "VADDSUBPS", "VAESDEC",
"VAESDECLAST", "VAESENC", "VAESENCLAST", "VAESIMC", "VAESKEYGENASSIST",
"VALIGND", "VALIGNQ", "VANDNPD", "VANDNPS", "VANDPD", "VANDPS",
"VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS", "VBLENDVPD",
"VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2", "VBROADCASTF32X4",
"VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4", "VBROADCASTI128",
"VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8", "VBROADCASTI64X2",
"VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS", "VCMPPD",
"VCMPPS", "VCMPSD", "VCMPSS", "VCOMISD", "VCOMISS", "VCOMPRESSPD",
"VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PS", "VCVTNE2PS2BF16", "VCVTNEPS2BF16",
"VCVTPD2DQ", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ", "VCVTPD2UQQ",
"VCVTPH2PS", "VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH", "VCVTPS2QQ",
"VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD", "VCVTQQ2PS", "VCVTSD2SI",
"VCVTSD2SS", "VCVTSD2USI", "VCVTSI2SD", "VCVTSI2SS", "VCVTSS2SD",
"VCVTSS2SI", "VCVTSS2USI", "VCVTTPD2DQ", "VCVTTPD2QQ", "VCVTTPD2UDQ",
"VCVTTPD2UQQ", "VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ", "VCVTTPS2UQQ",
"VCVTTSD2SI", "VCVTTSD2USI", "VCVTTSS2SI", "VCVTTSS2USI", "VCVTUDQ2PD",
"VCVTUDQ2PS", "VCVTUQQ2PD", "VCVTUQQ2PS", "VCVTUSI2SD", "VCVTUSI2SS",
"VDBPSADBW", "VDIVPD", "VDIVPS", "VDIVSD", "VDIVSS", "VDPBF16PS",
"VDPPD", "VDPPS", "VERR", "VERW", "VEXP2PD", "VEXP2PS", "VEXPANDPD",
"VEXPANDPS", "VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8",
"ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX", "AESDEC", "AESDEC128KL",
"AESDEC256KL", "AESDECLAST", "AESDECWIDE128KL", "AESDECWIDE256KL",
"AESENC", "AESENC128KL", "AESENC256KL", "AESENCLAST", "AESENCWIDE128KL",
"AESENCWIDE256KL", "AESIMC", "AESKEYGENASSIST", "ALTINST", "AND",
"ANDN", "ANDNPD", "ANDNPS", "ANDPD", "ANDPS", "ARPL", "BEXTR",
"BLCFILL", "BLCI", "BLCIC", "BLCMSK", "BLCS", "BLENDPD", "BLENDPS",
"BLENDVPD", "BLENDVPS", "BLSFILL", "BLSI", "BLSIC", "BLSMSK",
"BLSR", "BNDCL", "BNDCN", "BNDCU", "BNDLDX", "BNDMK", "BNDMOV",
"BNDSTX", "BOUND", "BSF", "BSR", "BSWAP", "BT", "BTC", "BTR",
"BTS", "BZHI", "CALL", "CALLF", "CBW", "CDQ", "CDQE", "CL1INVMB",
"CLAC", "CLC", "CLD", "CLDEMOTE", "CLEVICT0", "CLEVICT1", "CLFLUSH",
"CLFLUSHOPT", "CLGI", "CLI", "CLRSSBSY", "CLTS", "CLWB", "CLZERO",
"CMC", "CMOVBE", "CMOVC", "CMOVL", "CMOVLE", "CMOVNBE", "CMOVNC",
"CMOVNL", "CMOVNLE", "CMOVNO", "CMOVNP", "CMOVNS", "CMOVNZ",
"CMOVO", "CMOVP", "CMOVS", "CMOVZ", "CMP", "CMPPD", "CMPPS",
"CMPSB", "CMPSD", "CMPSQ", "CMPSS", "CMPSW", "CMPXCHG", "CMPXCHG16B",
"CMPXCHG8B", "COMISD", "COMISS", "CPUID", "CPU_READ", "CPU_WRITE",
"CQO", "CRC32", "CVTDQ2PD", "CVTDQ2PS", "CVTPD2DQ", "CVTPD2PI",
"CVTPD2PS", "CVTPI2PD", "CVTPI2PS", "CVTPS2DQ", "CVTPS2PD", "CVTPS2PI",
"CVTSD2SI", "CVTSD2SS", "CVTSI2SD", "CVTSI2SS", "CVTSS2SD", "CVTSS2SI",
"CVTTPD2DQ", "CVTTPD2PI", "CVTTPS2DQ", "CVTTPS2PI", "CVTTSD2SI",
"CVTTSS2SI", "CWD", "CWDE", "DAA", "DAS", "DEC", "DELAY", "DIV",
"DIVPD", "DIVPS", "DIVSD", "DIVSS", "DMINT", "DPPD", "DPPS",
"EMMS", "ENCLS", "ENCLU", "ENCLV", "ENCODEKEY128", "ENCODEKEY256",
"ENDBR32", "ENDBR64", "ENQCMD", "ENQCMDS", "ENTER", "EXTRACTPS",
"EXTRQ", "F2XM1", "FABS", "FADD", "FADDP", "FBLD", "FBSTP", "FCHS",
"FCMOVB", "FCMOVBE", "FCMOVE", "FCMOVNB", "FCMOVNBE", "FCMOVNE",
"FCMOVNU", "FCMOVU", "FCOM", "FCOMI", "FCOMIP", "FCOMP", "FCOMPP",
"FCOS", "FDECSTP", "FDIV", "FDIVP", "FDIVR", "FDIVRP", "FEMMS",
"FFREE", "FFREEP", "FIADD", "FICOM", "FICOMP", "FIDIV", "FIDIVR",
"FILD", "FIMUL", "FINCSTP", "FIST", "FISTP", "FISTTP", "FISUB",
"FISUBR", "FLD", "FLD1", "FLDCW", "FLDENV", "FLDL2E", "FLDL2T",
"FLDLG2", "FLDLN2", "FLDPI", "FLDZ", "FMUL", "FMULP", "FNCLEX",
"FNDISI", "FNINIT", "FNOP", "FNSAVE", "FNSTCW", "FNSTENV", "FNSTSW",
"FPATAN", "FPREM", "FPREM1", "FPTAN", "FRINEAR", "FRNDINT", "FRSTOR",
"FSCALE", "FSIN", "FSINCOS", "FSQRT", "FST", "FSTDW", "FSTP",
"FSTPNCE", "FSTSG", "FSUB", "FSUBP", "FSUBR", "FSUBRP", "FTST",
"FUCOM", "FUCOMI", "FUCOMIP", "FUCOMP", "FUCOMPP", "FXAM", "FXCH",
"FXRSTOR", "FXRSTOR64", "FXSAVE", "FXSAVE64", "FXTRACT", "FYL2X",
"FYL2XP1", "GETSEC", "GF2P8AFFINEINVQB", "GF2P8AFFINEQB", "GF2P8MULB",
"HADDPD", "HADDPS", "HLT", "HSUBPD", "HSUBPS", "IDIV", "IMUL",
"IN", "INC", "INCSSPD", "INCSSPQ", "INSB", "INSD", "INSERTPS",
"INSERTQ", "INSW", "INT", "INT1", "INT3", "INTO", "INVD", "INVEPT",
"INVLPG", "INVLPGA", "INVLPGB", "INVPCID", "INVVPID", "IRETD",
"IRETQ", "IRETW", "JBE", "JC", "JCXZ", "JECXZ", "JL", "JLE",
"JMP", "JMPE", "JMPF", "JNBE", "JNC", "JNL", "JNLE", "JNO", "JNP",
"JNS", "JNZ", "JO", "JP", "JRCXZ", "JS", "JZ", "KADDB", "KADDD",
"KADDQ", "KADDW", "KANDB", "KANDD", "KANDNB", "KANDND", "KANDNQ",
"KANDNW", "KANDQ", "KANDW", "KMERGE2L1H", "KMERGE2L1L", "KMOVB",
"KMOVD", "KMOVQ", "KMOVW", "KNOTB", "KNOTD", "KNOTQ", "KNOTW",
"KORB", "KORD", "KORQ", "KORTESTB", "KORTESTD", "KORTESTQ", "KORTESTW",
"KORW", "KSHIFTLB", "KSHIFTLD", "KSHIFTLQ", "KSHIFTLW", "KSHIFTRB",
"KSHIFTRD", "KSHIFTRQ", "KSHIFTRW", "KTESTB", "KTESTD", "KTESTQ",
"KTESTW", "KUNPCKBW", "KUNPCKDQ", "KUNPCKWD", "KXNORB", "KXNORD",
"KXNORQ", "KXNORW", "KXORB", "KXORD", "KXORQ", "KXORW", "LAHF",
"LAR", "LDDQU", "LDMXCSR", "LDS", "LDTILECFG", "LEA", "LEAVE",
"LES", "LFENCE", "LFS", "LGDT", "LGS", "LIDT", "LLDT", "LLWPCB",
"LMSW", "LOADIWKEY", "LODSB", "LODSD", "LODSQ", "LODSW", "LOOP",
"LOOPNZ", "LOOPZ", "LSL", "LSS", "LTR", "LWPINS", "LWPVAL", "LZCNT",
"MASKMOVDQU", "MASKMOVQ", "MAXPD", "MAXPS", "MAXSD", "MAXSS",
"MCOMMIT", "MFENCE", "MINPD", "MINPS", "MINSD", "MINSS", "MONITOR",
"MONITORX", "MONTMUL", "MOV", "MOVAPD", "MOVAPS", "MOVBE", "MOVD",
"MOVDDUP", "MOVDIR64B", "MOVDIRI", "MOVDQ2Q", "MOVDQA", "MOVDQU",
"MOVHLPS", "MOVHPD", "MOVHPS", "MOVLHPS", "MOVLPD", "MOVLPS",
"MOVMSKPD", "MOVMSKPS", "MOVNTDQ", "MOVNTDQA", "MOVNTI", "MOVNTPD",
"MOVNTPS", "MOVNTQ", "MOVNTSD", "MOVNTSS", "MOVQ", "MOVQ2DQ",
"MOVSB", "MOVSD", "MOVSHDUP", "MOVSLDUP", "MOVSQ", "MOVSS", "MOVSW",
"MOVSX", "MOVSXD", "MOVUPD", "MOVUPS", "MOVZX", "MPSADBW", "MUL",
"MULPD", "MULPS", "MULSD", "MULSS", "MULX", "MWAIT", "MWAITX",
"NEG", "NOP", "NOT", "OR", "ORPD", "ORPS", "OUT", "OUTSB", "OUTSD",
"OUTSW", "PABSB", "PABSD", "PABSW", "PACKSSDW", "PACKSSWB", "PACKUSDW",
"PACKUSWB", "PADDB", "PADDD", "PADDQ", "PADDSB", "PADDSW", "PADDUSB",
"PADDUSW", "PADDW", "PALIGNR", "PAND", "PANDN", "PAUSE", "PAVGB",
"PAVGUSB", "PAVGW", "PBLENDVB", "PBLENDW", "PCLMULQDQ", "PCMPEQB",
"PCMPEQD", "PCMPEQQ", "PCMPEQW", "PCMPESTRI", "PCMPESTRM", "PCMPGTB",
"PCMPGTD", "PCMPGTQ", "PCMPGTW", "PCMPISTRI", "PCMPISTRM", "PCOMMIT",
"PCONFIG", "PDEP", "PEXT", "PEXTRB", "PEXTRD", "PEXTRQ", "PEXTRW",
"PF2ID", "PF2IW", "PFACC", "PFADD", "PFCMPEQ", "PFCMPGE", "PFCMPGT",
"PFMAX", "PFMIN", "PFMUL", "PFNACC", "PFPNACC", "PFRCP", "PFRCPIT1",
"PFRCPIT2", "PFRCPV", "PFRSQIT1", "PFRSQRT", "PFRSQRTV", "PFSUB",
"PFSUBR", "PHADDD", "PHADDSW", "PHADDW", "PHMINPOSUW", "PHSUBD",
"PHSUBSW", "PHSUBW", "PI2FD", "PI2FW", "PINSRB", "PINSRD", "PINSRQ",
"PINSRW", "PMADDUBSW", "PMADDWD", "PMAXSB", "PMAXSD", "PMAXSW",
"PMAXUB", "PMAXUD", "PMAXUW", "PMINSB", "PMINSD", "PMINSW", "PMINUB",
"PMINUD", "PMINUW", "PMOVMSKB", "PMOVSXBD", "PMOVSXBQ", "PMOVSXBW",
"PMOVSXDQ", "PMOVSXWD", "PMOVSXWQ", "PMOVZXBD", "PMOVZXBQ", "PMOVZXBW",
"PMOVZXDQ", "PMOVZXWD", "PMOVZXWQ", "PMULDQ", "PMULHRSW", "PMULHRW",
"PMULHUW", "PMULHW", "PMULLD", "PMULLW", "PMULUDQ", "POP", "POPA",
"POPAD", "POPCNT", "POPFD", "POPFQ", "POPFW", "POR", "PREFETCH",
"PREFETCHE", "PREFETCHM", "PREFETCHNTA", "PREFETCHT0", "PREFETCHT1",
"PREFETCHT2", "PREFETCHW", "PREFETCHWT1", "PSADBW", "PSHUFB",
"PSHUFD", "PSHUFHW", "PSHUFLW", "PSHUFW", "PSIGNB", "PSIGND",
"PSIGNW", "PSLLD", "PSLLDQ", "PSLLQ", "PSLLW", "PSMASH", "PSRAD",
"PSRAW", "PSRLD", "PSRLDQ", "PSRLQ", "PSRLW", "PSUBB", "PSUBD",
"PSUBQ", "PSUBSB", "PSUBSW", "PSUBUSB", "PSUBUSW", "PSUBW", "PSWAPD",
"PTEST", "PTWRITE", "PUNPCKHBW", "PUNPCKHDQ", "PUNPCKHQDQ", "PUNPCKHWD",
"PUNPCKLBW", "PUNPCKLDQ", "PUNPCKLQDQ", "PUNPCKLWD", "PUSH",
"PUSHA", "PUSHAD", "PUSHFD", "PUSHFQ", "PUSHFW", "PVALIDATE",
"PXOR", "RCL", "RCPPS", "RCPSS", "RCR", "RDFSBASE", "RDGSBASE",
"RDMSR", "RDPID", "RDPKRU", "RDPMC", "RDPRU", "RDRAND", "RDSEED",
"RDSHR", "RDSSPD", "RDSSPQ", "RDTSC", "RDTSCP", "RETF", "RETN",
"RMPADJUST", "RMPUPDATE", "ROL", "ROR", "RORX", "ROUNDPD", "ROUNDPS",
"ROUNDSD", "ROUNDSS", "RSDC", "RSLDT", "RSM", "RSQRTPS", "RSQRTSS",
"RSTORSSP", "RSTS", "SAHF", "SAL", "SALC", "SAR", "SARX", "SAVEPREVSSP",
"SBB", "SCASB", "SCASD", "SCASQ", "SCASW", "SEAMCALL", "SEAMOPS",
"SEAMRET", "SERIALIZE", "SETBE", "SETC", "SETL", "SETLE", "SETNBE",
"SETNC", "SETNL", "SETNLE", "SETNO", "SETNP", "SETNS", "SETNZ",
"SETO", "SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE", "SGDT",
"SHA1MSG1", "SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1",
"SHA256MSG2", "SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD",
"SHRX", "SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB",
"SMINT", "SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS",
"STAC", "STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD",
"STOSQ", "STOSW", "STR", "STTILECFG", "SUB", "SUBPD", "SUBPS",
"SUBSD", "SUBSS", "SVDC", "SVLDT", "SVTS", "SWAPGS", "SYSCALL",
"SYSENTER", "SYSEXIT", "SYSRET", "T1MSKC", "TDCALL", "TDPBF16PS",
"TDPBSSD", "TDPBSUD", "TDPBUSD", "TDPBUUD", "TEST", "TILELOADD",
"TILELOADDT1", "TILERELEASE", "TILESTORED", "TILEZERO", "TLBSYNC",
"TPAUSE", "TZCNT", "TZMSK", "UCOMISD", "UCOMISS", "UD0", "UD1",
"UD2", "UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS", "UNPCKLPD",
"UNPCKLPS", "V4FMADDPS", "V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS",
"VADDPD", "VADDPS", "VADDSD", "VADDSS", "VADDSUBPD", "VADDSUBPS",
"VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST", "VAESIMC",
"VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD", "VANDNPS",
"VANDPD", "VANDPS", "VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS",
"VBLENDVPD", "VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2",
"VBROADCASTF32X4", "VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4",
"VBROADCASTI128", "VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8",
"VBROADCASTI64X2", "VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS",
"VCMPPD", "VCMPPS", "VCMPSD", "VCMPSS", "VCOMISD", "VCOMISS",
"VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PS", "VCVTNE2PS2BF16",
"VCVTNEPS2BF16", "VCVTPD2DQ", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ",
"VCVTPD2UQQ", "VCVTPH2PS", "VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH",
"VCVTPS2QQ", "VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD", "VCVTQQ2PS",
"VCVTSD2SI", "VCVTSD2SS", "VCVTSD2USI", "VCVTSI2SD", "VCVTSI2SS",
"VCVTSS2SD", "VCVTSS2SI", "VCVTSS2USI", "VCVTTPD2DQ", "VCVTTPD2QQ",
"VCVTTPD2UDQ", "VCVTTPD2UQQ", "VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ",
"VCVTTPS2UQQ", "VCVTTSD2SI", "VCVTTSD2USI", "VCVTTSS2SI", "VCVTTSS2USI",
"VCVTUDQ2PD", "VCVTUDQ2PS", "VCVTUQQ2PD", "VCVTUQQ2PS", "VCVTUSI2SD",
"VCVTUSI2SS", "VDBPSADBW", "VDIVPD", "VDIVPS", "VDIVSD", "VDIVSS",
"VDPBF16PS", "VDPPD", "VDPPS", "VERR", "VERW", "VEXP2PD", "VEXP2PS",
"VEXPANDPD", "VEXPANDPS", "VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8",
"VEXTRACTF64X2", "VEXTRACTF64X4", "VEXTRACTI128", "VEXTRACTI32X4",
"VEXTRACTI32X8", "VEXTRACTI64X2", "VEXTRACTI64X4", "VEXTRACTPS",
"VFIXUPIMMPD", "VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS", "VFMADD132PD",

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bddisasm/include/table_evex.h
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bddisasm/include/table_root.h
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bddisasm/include/table_vex.h
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170
bddisasm/include/table_xop.h
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@ -4,19 +4,19 @@
const ND_TABLE_INSTRUCTION gXopTable_root_0a_10_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[56]
(const void *)&gInstructions[64]
};
const ND_TABLE_INSTRUCTION gXopTable_root_0a_12_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[584]
(const void *)&gInstructions[595]
};
const ND_TABLE_INSTRUCTION gXopTable_root_0a_12_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[585]
(const void *)&gInstructions[596]
};
const ND_TABLE_MODRM_REG gXopTable_root_0a_12_modrmreg =
@ -300,43 +300,43 @@ const ND_TABLE_OPCODE gXopTable_root_0a_opcode =
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[57]
(const void *)&gInstructions[65]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_05_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[59]
(const void *)&gInstructions[67]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_03_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[61]
(const void *)&gInstructions[69]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_02_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[66]
(const void *)&gInstructions[74]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_06_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[68]
(const void *)&gInstructions[76]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_07_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1302]
(const void *)&gInstructions[1313]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_04_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1325]
(const void *)&gInstructions[1336]
};
const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
@ -357,13 +357,13 @@ const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
const ND_TABLE_INSTRUCTION gXopTable_root_09_02_06_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[58]
(const void *)&gInstructions[66]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_02_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[60]
(const void *)&gInstructions[68]
};
const ND_TABLE_MODRM_REG gXopTable_root_09_02_modrmreg =
@ -384,13 +384,13 @@ const ND_TABLE_MODRM_REG gXopTable_root_09_02_modrmreg =
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[567]
(const void *)&gInstructions[577]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1254]
(const void *)&gInstructions[1265]
};
const ND_TABLE_MODRM_REG gXopTable_root_09_12_reg_modrmreg =
@ -420,127 +420,127 @@ const ND_TABLE_MODRM_MOD gXopTable_root_09_12_modrmmod =
const ND_TABLE_INSTRUCTION gXopTable_root_09_81_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1676]
(const void *)&gInstructions[1687]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_80_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1677]
(const void *)&gInstructions[1688]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_83_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1678]
(const void *)&gInstructions[1689]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_82_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1679]
(const void *)&gInstructions[1690]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2065]
(const void *)&gInstructions[2076]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2066]
(const void *)&gInstructions[2077]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2067]
(const void *)&gInstructions[2078]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_cb_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2069]
(const void *)&gInstructions[2080]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2071]
(const void *)&gInstructions[2082]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2072]
(const void *)&gInstructions[2083]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2073]
(const void *)&gInstructions[2084]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_db_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2074]
(const void *)&gInstructions[2085]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2075]
(const void *)&gInstructions[2086]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d7_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2076]
(const void *)&gInstructions[2087]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2078]
(const void *)&gInstructions[2089]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c7_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2079]
(const void *)&gInstructions[2090]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2081]
(const void *)&gInstructions[2092]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2083]
(const void *)&gInstructions[2094]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2086]
(const void *)&gInstructions[2097]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2248]
(const void *)&gInstructions[2259]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2249]
(const void *)&gInstructions[2260]
};
const ND_TABLE_VEX_W gXopTable_root_09_90_w =
@ -555,13 +555,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_90_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2251]
(const void *)&gInstructions[2262]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2252]
(const void *)&gInstructions[2263]
};
const ND_TABLE_VEX_W gXopTable_root_09_92_w =
@ -576,13 +576,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_92_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2254]
(const void *)&gInstructions[2265]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2255]
(const void *)&gInstructions[2266]
};
const ND_TABLE_VEX_W gXopTable_root_09_93_w =
@ -597,13 +597,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_93_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2257]
(const void *)&gInstructions[2268]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2258]
(const void *)&gInstructions[2269]
};
const ND_TABLE_VEX_W gXopTable_root_09_91_w =
@ -618,13 +618,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_91_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2265]
(const void *)&gInstructions[2276]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2266]
(const void *)&gInstructions[2277]
};
const ND_TABLE_VEX_W gXopTable_root_09_98_w =
@ -639,13 +639,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_98_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2267]
(const void *)&gInstructions[2278]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2268]
(const void *)&gInstructions[2279]
};
const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
@ -660,13 +660,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2269]
(const void *)&gInstructions[2280]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2270]
(const void *)&gInstructions[2281]
};
const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
@ -681,13 +681,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2271]
(const void *)&gInstructions[2282]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2272]
(const void *)&gInstructions[2283]
};
const ND_TABLE_VEX_W gXopTable_root_09_99_w =
@ -702,13 +702,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_99_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2273]
(const void *)&gInstructions[2284]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2274]
(const void *)&gInstructions[2285]
};
const ND_TABLE_VEX_W gXopTable_root_09_94_w =
@ -723,13 +723,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_94_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2275]
(const void *)&gInstructions[2286]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2286]
(const void *)&gInstructions[2297]
};
const ND_TABLE_VEX_W gXopTable_root_09_95_w =
@ -744,13 +744,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_95_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2276]
(const void *)&gInstructions[2287]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2277]
(const void *)&gInstructions[2288]
};
const ND_TABLE_VEX_W gXopTable_root_09_96_w =
@ -765,13 +765,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_96_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2284]
(const void *)&gInstructions[2295]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2285]
(const void *)&gInstructions[2296]
};
const ND_TABLE_VEX_W gXopTable_root_09_97_w =
@ -1049,13 +1049,13 @@ const ND_TABLE_OPCODE gXopTable_root_09_opcode =
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1951]
(const void *)&gInstructions[1962]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1952]
(const void *)&gInstructions[1963]
};
const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
@ -1070,133 +1070,133 @@ const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
const ND_TABLE_INSTRUCTION gXopTable_root_08_cc_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1981]
(const void *)&gInstructions[1992]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ce_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1982]
(const void *)&gInstructions[1993]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_cf_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1987]
(const void *)&gInstructions[1998]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ec_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1988]
(const void *)&gInstructions[1999]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ee_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1989]
(const void *)&gInstructions[2000]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ef_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1990]
(const void *)&gInstructions[2001]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ed_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1991]
(const void *)&gInstructions[2002]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_cd_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1992]
(const void *)&gInstructions[2003]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_9e_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2101]
(const void *)&gInstructions[2112]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_9f_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2102]
(const void *)&gInstructions[2113]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_97_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2103]
(const void *)&gInstructions[2114]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_8e_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2104]
(const void *)&gInstructions[2115]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_8f_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2105]
(const void *)&gInstructions[2116]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_87_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2106]
(const void *)&gInstructions[2117]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_86_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2107]
(const void *)&gInstructions[2118]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_85_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2108]
(const void *)&gInstructions[2119]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_96_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2109]
(const void *)&gInstructions[2120]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_95_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2110]
(const void *)&gInstructions[2121]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2111]
(const void *)&gInstructions[2122]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_b6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2112]
(const void *)&gInstructions[2123]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2237]
(const void *)&gInstructions[2248]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2238]
(const void *)&gInstructions[2249]
};
const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
@ -1211,25 +1211,25 @@ const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
const ND_TABLE_INSTRUCTION gXopTable_root_08_c0_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2247]
(const void *)&gInstructions[2258]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2250]
(const void *)&gInstructions[2261]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2253]
(const void *)&gInstructions[2264]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2256]
(const void *)&gInstructions[2267]
};
const ND_TABLE_OPCODE gXopTable_root_08_opcode =

9
bddisasm/include/tabledefs.h
Unescape View File

@ -312,6 +312,8 @@ typedef enum _ND_OPERAND_SIZE_SPEC
ND_OPS_n,
ND_OPS_u,
ND_OPS_t, // Tile register size, can be up to 1K.
ND_OPS_384, // 384 bit Key Locker handle.
ND_OPS_512, // 512 bit Key Locker handle.
// Stack sizes - indicates number of words. Also, hybrid sizes - sizes where from a large register (say 32 bit GPR)
// only a smaller amount of data is used (for example, 8 bit).
ND_OPS_v2,
@ -425,6 +427,13 @@ typedef enum _ND_OPERAND_TYPE_SPEC
// SSE registers.
ND_OPT_SSE_XMM0,
ND_OPT_SSE_XMM1,
ND_OPT_SSE_XMM2,
ND_OPT_SSE_XMM3,
ND_OPT_SSE_XMM4,
ND_OPT_SSE_XMM5,
ND_OPT_SSE_XMM6,
ND_OPT_SSE_XMM7,
// Implicit memory operands.
ND_OPT_MEM_rBX_AL,

BIN
bddisasm_test/kl/kl_64
View File

Binary file not shown.

13
bddisasm_test/kl/kl_64.asm
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@ -0,0 +1,13 @@
bits 64
db 0xF3, 0x0F, 0x38, 0xDC, 0x01 ; AESENC128KL xmm0, m384 ptr [rcx]
db 0xF3, 0x0F, 0x38, 0xDD, 0x01 ; AESDEC128KL xmm0, m384 ptr [rcx]
db 0xF3, 0x0F, 0x38, 0xDE, 0x08 ; AESENC256KL xmm1, zmmword ptr [rax]
db 0xF3, 0x0F, 0x38, 0xDF, 0x08 ; AESDEC256KL xmm1, zmmword ptr [rax]
db 0xF3, 0x0F, 0x38, 0xD8, 0x00 ; AESENCWIDE128KL m384 ptr [rax]
db 0xF3, 0x0F, 0x38, 0xD8, 0x08 ; AESDECWIDE128KL m384 ptr [rax]
db 0xF3, 0x0F, 0x38, 0xD8, 0x10 ; AESENCWIDE256KL m384 ptr [rax]
db 0xF3, 0x0F, 0x38, 0xD8, 0x18 ; AESDECWIDE256KL m384 ptr [rax]
db 0xF3, 0x0F, 0x38, 0xFA, 0xC0 ; ENCODEKEY128 eax, eax
db 0xF3, 0x0F, 0x38, 0xFB, 0xCF ; ENCODEKEY256 esi, esi
db 0xF3, 0x0F, 0x38, 0xDC, 0xC1 ; LOADIWKEY xmm0, xmm1

224
bddisasm_test/kl/kl_64.result
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@ -0,0 +1,224 @@
0000000000000000 f30f38dc01 AESENC128KL xmm0, m384 ptr [rcx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: KL, Ins cat: AESKL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 1, Acc: R-, Type: Memory, Size: 48, RawSize: 48, Encoding: M,
Segment: 3, Base: 1,
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000005 f30f38dd01 AESDEC128KL xmm0, m384 ptr [rcx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: KL, Ins cat: AESKL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 1, Acc: R-, Type: Memory, Size: 48, RawSize: 48, Encoding: M,
Segment: 3, Base: 1,
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
000000000000000A f30f38de08 AESENC256KL xmm1, zmmword ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: KL, Ins cat: AESKL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
Operand: 1, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M,
Segment: 3, Base: 0,
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
000000000000000F f30f38df08 AESDEC256KL xmm1, zmmword ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: KL, Ins cat: AESKL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
Operand: 1, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M,
Segment: 3, Base: 0,
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000014 f30f38d800 AESENCWIDE128KL m384 ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: KL, Ins cat: WIDE_KL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 48, RawSize: 48, Encoding: M,
Segment: 3, Base: 0,
Operand: 1, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 8
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000019 f30f38d808 AESDECWIDE128KL m384 ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: KL, Ins cat: WIDE_KL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 48, RawSize: 48, Encoding: M,
Segment: 3, Base: 0,
Operand: 1, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 8
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
000000000000001E f30f38d810 AESENCWIDE256KL zmmword ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: KL, Ins cat: WIDE_KL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M,
Segment: 3, Base: 0,
Operand: 1, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 8
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000023 f30f38d818 AESDECWIDE256KL zmmword ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: KL, Ins cat: WIDE_KL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M,
Segment: 3, Base: 0,
Operand: 1, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 8
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000028 f30f38fac0 ENCODEKEY128 eax, eax
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: KL, Ins cat: AESKL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: 0, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 3
Operand: 4, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 3
Operand: 5, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
000000000000002D f30f38fbcf ENCODEKEY256 ecx, edi
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: KL, Ins cat: AESKL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: 0, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 7, RegCount: 1
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 2
Operand: 3, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 5
Operand: 4, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000032 f30f38dcc1 LOADIWKEY xmm0, xmm1
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: KL, Ins cat: KL, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 23
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: no, R2: no, R3: no
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
Operand: 2, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
Operand: 3, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: S, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 4, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1

4
disasmtool/disasmtool.c
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@ -143,6 +143,7 @@ const char* set_to_string(
case ND_SET_I86: return "I86";
case ND_SET_INVPCID: return "INVPCID";
case ND_SET_INVLPGB: return "INVLPGB";
case ND_SET_KL: return "KL";
case ND_SET_LONGMODE: return "LONGMODE";
case ND_SET_LWP: return "LWP";
case ND_SET_LZCNT: return "LZCNT";
@ -217,6 +218,7 @@ const char* category_to_string(
{
case ND_CAT_3DNOW: return "3DNOW";
case ND_CAT_AES: return "AES";
case ND_CAT_AESKL: return "AESKL";
case ND_CAT_ARITH: return "ARITH";
case ND_CAT_AMX: return "AMX";
case ND_CAT_AVX: return "AVX";
@ -252,6 +254,7 @@ const char* category_to_string(
case ND_CAT_INTERRUPT: return "INTERRUPT";
case ND_CAT_IO: return "IO";
case ND_CAT_IOSTRINGOP: return "IOSTRINGOP";
case ND_CAT_KL: return "KL";
case ND_CAT_KMASK: return "KMASK";
case ND_CAT_KNL: return "KNL";
case ND_CAT_LOGIC: return "LOGIC";
@ -307,6 +310,7 @@ const char* category_to_string(
case ND_CAT_WAITPKG: return "WAITPKG";
case ND_CAT_WBNOINVD: return "WBNOINVD";
case ND_CAT_WIDENOP: return "WIDENOP";
case ND_CAT_WIDE_KL: return "WIDE_KL";
case ND_CAT_X87_ALU: return "X87_ALU";
case ND_CAT_XOP: return "XOP";
case ND_CAT_XSAVE: return "XSAVE";

15
disasmtool_lix/dumpers.cpp
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@ -83,8 +83,16 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
case ND_INS_ADDSUBPS: return "addsubps";
case ND_INS_ADOX: return "adox";
case ND_INS_AESDEC: return "aesdec";
case ND_INS_AESDEC128KL: return "aesdec128kl";
case ND_INS_AESDEC256KL: return "aesdec256kl";
case ND_INS_AESDECWIDE128KL: return "aesdecwide128kl";
case ND_INS_AESDECWIDE256KL: return "aesdecwide256kl";
case ND_INS_AESDECLAST: return "aesdeclast";
case ND_INS_AESENC: return "aesenc";
case ND_INS_AESENC128KL: return "aesenc128kl";
case ND_INS_AESENC256KL: return "aesenc256kl";
case ND_INS_AESENCWIDE128KL: return "aesencwide128kl";
case ND_INS_AESENCWIDE256KL: return "aesencwide256kl";
case ND_INS_AESENCLAST: return "aesenclast";
case ND_INS_AESIMC: return "aesimc";
case ND_INS_AESKEYGENASSIST: return "aeskeygenassist";
@ -207,6 +215,8 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
case ND_INS_ENCLS: return "encls";
case ND_INS_ENCLU: return "enclu";
case ND_INS_ENCLV: return "enclv";
case ND_INS_ENCODEKEY128: return "encodekey128";
case ND_INS_ENCODEKEY256: return "encodekey256";
case ND_INS_ENDBR: return "endbr";
case ND_INS_ENQCMD: return "enqcmd";
case ND_INS_ENQCMDS: return "enqcmds";
@ -380,6 +390,7 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
case ND_INS_LLDT: return "lldt";
case ND_INS_LLWPCB: return "llwpcb";
case ND_INS_LMSW: return "lmsw";
case ND_INS_LOADIWKEY: return "loadiwkey";
case ND_INS_LODS: return "lods";
case ND_INS_LOOP: return "loop";
case ND_INS_LOOPNZ: return "loopnz";
@ -1541,6 +1552,7 @@ std::string ins_cat_to_str(ND_INS_CATEGORY category)
case ND_CAT_INVALID: return "invalid";
case ND_CAT_3DNOW: return "3dnow";
case ND_CAT_AES: return "aes";
case ND_CAT_AESKL: return "aeskl";
case ND_CAT_AMX: return "amx";
case ND_CAT_ARITH: return "arith";
case ND_CAT_AVX: return "avx";
@ -1576,6 +1588,7 @@ std::string ins_cat_to_str(ND_INS_CATEGORY category)
case ND_CAT_INTERRUPT: return "interrupt";
case ND_CAT_IO: return "io";
case ND_CAT_IOSTRINGOP: return "iostringop";
case ND_CAT_KL: return "kl";
case ND_CAT_KMASK: return "kmask";
case ND_CAT_KNL: return "knl";
case ND_CAT_LOGIC: return "logic";
@ -1630,6 +1643,7 @@ std::string ins_cat_to_str(ND_INS_CATEGORY category)
case ND_CAT_VTX: return "vtx";
case ND_CAT_WAITPKG: return "waitpkg";
case ND_CAT_WBNOINVD: return "wbnoinvd";
case ND_CAT_WIDE_KL: return "wide_kl";
case ND_CAT_WIDENOP: return "widenop";
case ND_CAT_X87_ALU: return "x87_alu";
case ND_CAT_XOP: return "xop";
@ -1698,6 +1712,7 @@ std::string ins_set_to_str(ND_INS_SET ins_set)
case ND_SET_I64: return "i64";
case ND_SET_I86: return "i86";
case ND_SET_INVPCID: return "invpcid";
case ND_SET_KL: return "kl";
case ND_SET_LONGMODE: return "longmode";
case ND_SET_LWP: return "lwp";
case ND_SET_LZCNT: return "lzcnt";

3
inc/bddisasm.h
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@ -110,7 +110,8 @@
#define ND_SIZE_128BIT 16 // 1 xmm word or 16 bytes.
#define ND_SIZE_224BIT 28 // FPU environment, 28 bytes.
#define ND_SIZE_256BIT 32 // 1 ymm word or 32 bytes.
#define ND_SIZE_512BIT 64 // 1 zmm word or 64 bytes.
#define ND_SIZE_384BIT 48 // 48 bytes, used for Key Locker handles.
#define ND_SIZE_512BIT 64 // 1 zmm word or 64 bytes. Used also for Key Locker handles.
#define ND_SIZE_752BIT 94 // FPU state, 94 bytes.
#define ND_SIZE_864BIT 108 // FPU state, 108 bytes.
#define ND_SIZE_4096BIT 512 // Extended state, 512 bytes.

15
inc/constants.h
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@ -24,9 +24,17 @@ typedef enum _ND_INS_CLASS
ND_INS_ADDSUBPS,
ND_INS_ADOX,
ND_INS_AESDEC,
ND_INS_AESDEC128KL,
ND_INS_AESDEC256KL,
ND_INS_AESDECLAST,
ND_INS_AESDECWIDE128KL,
ND_INS_AESDECWIDE256KL,
ND_INS_AESENC,
ND_INS_AESENC128KL,
ND_INS_AESENC256KL,
ND_INS_AESENCLAST,
ND_INS_AESENCWIDE128KL,
ND_INS_AESENCWIDE256KL,
ND_INS_AESIMC,
ND_INS_AESKEYGENASSIST,
ND_INS_ALTINST,
@ -148,6 +156,8 @@ typedef enum _ND_INS_CLASS
ND_INS_ENCLS,
ND_INS_ENCLU,
ND_INS_ENCLV,
ND_INS_ENCODEKEY128,
ND_INS_ENCODEKEY256,
ND_INS_ENDBR,
ND_INS_ENQCMD,
ND_INS_ENQCMDS,
@ -321,6 +331,7 @@ typedef enum _ND_INS_CLASS
ND_INS_LLDT,
ND_INS_LLWPCB,
ND_INS_LMSW,
ND_INS_LOADIWKEY,
ND_INS_LODS,
ND_INS_LOOP,
ND_INS_LOOPNZ,
@ -1531,6 +1542,7 @@ typedef enum _ND_INS_SET
ND_SET_I86,
ND_SET_INVLPGB,
ND_SET_INVPCID,
ND_SET_KL,
ND_SET_LONGMODE,
ND_SET_LWP,
ND_SET_LZCNT,
@ -1598,6 +1610,7 @@ typedef enum _ND_INS_TYPE
ND_CAT_INVALID = 0,
ND_CAT_3DNOW,
ND_CAT_AES,
ND_CAT_AESKL,
ND_CAT_AMX,
ND_CAT_ARITH,
ND_CAT_AVX,
@ -1633,6 +1646,7 @@ typedef enum _ND_INS_TYPE
ND_CAT_INTERRUPT,
ND_CAT_IO,
ND_CAT_IOSTRINGOP,
ND_CAT_KL,
ND_CAT_KMASK,
ND_CAT_KNL,
ND_CAT_LOGIC,
@ -1688,6 +1702,7 @@ typedef enum _ND_INS_TYPE
ND_CAT_WAITPKG,
ND_CAT_WBNOINVD,
ND_CAT_WIDENOP,
ND_CAT_WIDE_KL,
ND_CAT_X87_ALU,
ND_CAT_XOP,
ND_CAT_XSAVE,

1
inc/cpuidflags.h
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@ -69,6 +69,7 @@
#define ND_CFF_AVX512BITALG ND_CFF(0x00000007, 0x00000000, NDR_ECX, 12)
#define ND_CFF_AVX512VPOPCNTDQ ND_CFF(0x00000007, 0x00000000, NDR_ECX, 14)
#define ND_CFF_RDPID ND_CFF(0x00000007, 0x00000000, NDR_ECX, 22)
#define ND_CFF_KL ND_CFF(0x00000007, 0x00000000, NDR_ECX, 23)
#define ND_CFF_CLDEMOTE ND_CFF(0x00000007, 0x00000000, NDR_ECX, 25)
#define ND_CFF_MOVDIRI ND_CFF(0x00000007, 0x00000000, NDR_ECX, 27)
#define ND_CFF_MOVDIR64B ND_CFF(0x00000007, 0x00000000, NDR_ECX, 28)

2
inc/version.h
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@ -6,7 +6,7 @@
#define DISASM_VER_H
#define DISASM_VERSION_MAJOR 1
#define DISASM_VERSION_MINOR 29
#define DISASM_VERSION_MINOR 30
#define DISASM_VERSION_REVISION 0
#endif // DISASM_VER_H

17
isagenerator/disasmlib.py
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@ -202,6 +202,9 @@ valid_opsize = [
'cl', # 32/64/128 bytes - the size of one cache line.
'12', # 4 bytes (0) + 8 bytes (old SSP), used by SAVEPREVSSP.
't', # A tile register. The size varies dependning on execution environment, but can be as high as 1K.
'384', # 384 bits representing a Key Locker handle.
'512', # 512 bits representing a Key Locker handle.
]
# Implicit/fixed operands. Self explanatory.
@ -244,6 +247,13 @@ valid_impops = {# register size
'yIP' : ('rIP', 'yf'), # EIP in 16/32 bit mode, or RIP in 64 bit mode.
'1' : ('1', 'b'), # Constant 1.
'XMM0' : ('XMM0', 'dq'), # XMM0 register.
'XMM1' : ('XMM1', 'dq'), # XMM1 register.
'XMM2' : ('XMM2', 'dq'), # XMM2 register.
'XMM3' : ('XMM3', 'dq'), # XMM3 register.
'XMM4' : ('XMM4', 'dq'), # XMM4 register.
'XMM5' : ('XMM5', 'dq'), # XMM5 register.
'XMM6' : ('XMM6', 'dq'), # XMM6 register.
'XMM7' : ('XMM7', 'dq'), # XMM7 register.
'ST(0)' : ('ST(0)', 'ft'), # ST(0) register.
'ST(i)' : ('ST(i)', 'ft'), # ST(1) register.
'CS' : ('CS', 'v'), # CS register.
@ -550,6 +560,13 @@ class Operand():
elif op.endswith('+1'):
self.Block = 2
op = op.replace('+1', '')
else:
m = re.match(r'XMM(\d)-(\d)', op)
if m:
start = m.group(1)
end = m.group(2)
self.Block = int(end) - int(start) + 1
op = 'XMM' + start
# Handle the decorators.
for dec in valid_decorators:

9
isagenerator/generate_tables.py
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@ -136,6 +136,13 @@ optype = {
'ST(0)' : 'ND_OPT_FPU_ST0',
'ST(i)' : 'ND_OPT_FPU_STX',
'XMM0' : 'ND_OPT_SSE_XMM0',
'XMM1' : 'ND_OPT_SSE_XMM1',
'XMM2' : 'ND_OPT_SSE_XMM2',
'XMM3' : 'ND_OPT_SSE_XMM3',
'XMM4' : 'ND_OPT_SSE_XMM4',
'XMM5' : 'ND_OPT_SSE_XMM5',
'XMM6' : 'ND_OPT_SSE_XMM6',
'XMM7' : 'ND_OPT_SSE_XMM7',
# Memory operands
'pBXAL' : 'ND_OPT_MEM_rBX_AL',
@ -233,6 +240,8 @@ opsize = {
'cl' : 'ND_OPS_cl',
'12' : 'ND_OPS_12',
't' : 'ND_OPS_t',
'384' : 'ND_OPS_384',
'512' : 'ND_OPS_512',
}
opdecorators = {

1
isagenerator/instructions/cpuid.dat
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@ -69,6 +69,7 @@ AVX512VNNI : 0x00000007, 0x00000000, ECX, 11
AVX512BITALG : 0x00000007, 0x00000000, ECX, 12
AVX512VPOPCNTDQ : 0x00000007, 0x00000000, ECX, 14
RDPID : 0x00000007, 0x00000000, ECX, 22
KL : 0x00000007, 0x00000000, ECX, 23
CLDEMOTE : 0x00000007, 0x00000000, ECX, 25
MOVDIRI : 0x00000007, 0x00000000, ECX, 27
MOVDIR64B : 0x00000007, 0x00000000, ECX, 28

6
isagenerator/instructions/flags.dat
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@ -99,3 +99,9 @@ CL : SF=t|OF=t
CNL : SF=t|OF=t
CLE : SF=t|ZF=t|OF=t
CNLE : SF=t|ZF=t|OF=t
# AES Key Locker instructions. ZF set to 0 or 1, depending on success. All other flags are cleared to 0.
AESKL : CF=0|PF=0|AF=0|ZF=m|SF=0|OF=0
# All flags are zeroed.
ZERO : CF=0|PF=0|AF=0|ZF=0|SF=0|OF=0

12
isagenerator/instructions/table_0F_38.dat
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@ -99,11 +99,20 @@ SHA256MSG2 Vdq,Wdq nil [ NP 0x0F 0x
GF2P8MULB Vdq,Wdq nil [ 0x66 0x0F 0x38 0xCF /r] s:GFNI, t:GFNI, w:RW|R, e:4
# 0xD0 - 0xDF
AESENCWIDE128KL M384 XMM0-7,Fv [ 0xF3 0x0F 0x38 0xD8 /0:mem] s:KL, t:WIDE_KL, w:R|RW|W, f:AESKL
AESDECWIDE128KL M384 XMM0-7,Fv [ 0xF3 0x0F 0x38 0xD8 /1:mem] s:KL, t:WIDE_KL, w:R|RW|W, f:AESKL
AESENCWIDE256KL M512 XMM0-7,Fv [ 0xF3 0x0F 0x38 0xD8 /2:mem] s:KL, t:WIDE_KL, w:R|RW|W, f:AESKL
AESDECWIDE256KL M512 XMM0-7,Fv [ 0xF3 0x0F 0x38 0xD8 /3:mem] s:KL, t:WIDE_KL, w:R|RW|W, f:AESKL
AESIMC Vdq,Wdq nil [ 0x66 0x0F 0x38 0xDB /r] s:AES, t:AES, w:W|R, e:4
AESENC Vdq,Wdq nil [ 0x66 0x0F 0x38 0xDC /r] s:AES, t:AES, w:RW|R, e:4
AESENC128KL Vdq,M384 Fv [ 0xF3 0x0F 0x38 0xDC /r:mem] s:KL, t:AESKL, w:RW|R|W, f:AESKL
LOADIWKEY Vdq,Udq EAX,XMM0,Fv [ 0xF3 0x0F 0x38 0xDC /r:reg] s:KL, t:KL, w:R|R|R|R|W, f:AESKL, m:KERNEL
AESENCLAST Vdq,Wdq nil [ 0x66 0x0F 0x38 0xDD /r] s:AES, t:AES, w:RW|R, e:4
AESDEC128KL Vdq,M384 Fv [ 0xF3 0x0F 0x38 0xDD /r:mem] s:KL, t:AESKL, w:RW|R|W, f:AESKL
AESDEC Vdq,Wdq nil [ 0x66 0x0F 0x38 0xDE /r] s:AES, t:AES, w:RW|R, e:4
AESENC256KL Vdq,M512 Fv [ 0xF3 0x0F 0x38 0xDE /r:mem] s:KL, t:AESKL, w:RW|R|W, f:AESKL
AESDECLAST Vdq,Wdq nil [ 0x66 0x0F 0x38 0xDF /r] s:AES, t:AES, w:RW|R, e:4
AESDEC256KL Vdq,M512 Fv [ 0xF3 0x0F 0x38 0xDF /r:mem] s:KL, t:AESKL, w:RW|R|W, f:AESKL
# 0xE0 - 0xEF
@ -126,3 +135,6 @@ MOVDIR64B rMoq,Moq nil [ 0x66 0x0F 0x
ENQCMD rM?,Moq Fv [ 0xF2 0x0F 0x38 0xF8 /r:mem] s:ENQCMD, t:ENQCMD, w:W|R|W, f:ENQCMD
ENQCMDS rM?,Moq Fv [ 0xF3 0x0F 0x38 0xF8 /r:mem] s:ENQCMD, t:ENQCMD, w:W|R|W, f:ENQCMD
MOVDIRI My,Gy nil [ NP 0x0F 0x38 0xF9 /r:mem] s:MOVDIRI, t:MOVDIRI, w:W|R
ENCODEKEY128 Gd,Rd XMM0,XMM0-2,XMM4-6,Fv [ 0xF3 0x0F 0x38 0xFA /r:reg] s:KL, t:AESKL, w:W|R|R|W|W|W, f:ZERO
ENCODEKEY256 Gd,Rd XMM0-1,XMM2-6,Fv [ 0xF3 0x0F 0x38 0xFB /r:reg] s:KL, t:AESKL, w:W|R|RW|W|W, f:ZERO

2
pybddisasm/setup.py
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@ -12,7 +12,7 @@ from setuptools import find_packages, setup, Command, Extension, Distribution
from codecs import open
VERSION = (0, 1, 3)
LIBRARY_VERSION = (1, 29, 0)
LIBRARY_VERSION = (1, 30, 0)
LIBRARY_INSTRUX_SIZE = 864
packages = ['pybddisasm']

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