Commit Graph

13 Commits (ee6cdd6cb6eacf49e68ea3516f8502dceb2f8e40)

Author SHA1 Message Date
BITDEFENDER\vlutas ee6cdd6cb6 Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
1 year ago
BITDEFENDER\vlutas 7a254037b0 Added support for AMD RMPQUERY instruction.
2 years ago
BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
2 years ago
BITDEFENDER\vlutas 4596dbda51 Add copyright info when auto-generating files.
2 years ago
Andrei Vlad LUTAS 76d92e73c2 Multiple changes
3 years ago
Andrei Vlad LUTAS fccf11915d Added support for Intel FRED and LKGS instructions.
3 years ago
Andrei Vlad LUTAS 58197cc518 Removed support for PCOMMIT and CL1INVMB (not implemented by any x86/x64 CPUs), and marked MOV to/from test registers as being invalid in long mode.
4 years ago
Andrei Vlad LUTAS 9652450125 Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
4 years ago
Andrei Vlad LUTAS 4f8b030ddd Added support for Intel Key Locker instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-key-locker-specification.html.
4 years ago
Andrei Vlad LUTAS 33078e4670 Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
4 years ago
Ionel-Cristinel ANICHITEI 049ecc0ab7 Don't use reserved identifiers for include guards
4 years ago
Andrei Vlad LUTAS 752bc626c4 Fixed RET with immediate - the immediate is not sign-extended.
4 years ago
Andrei Vlad LUTAS 698ba367a1 Initial commit.
4 years ago