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Added support for AMD RMPQUERY instruction.

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BITDEFENDER\vlutas 2022-10-27 12:37:02 +03:00
parent f75e1e28cd
commit 7a254037b0
16 changed files with 4916 additions and 4851 deletions
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6377
bddisasm/include/instructions.h
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193
bddisasm/include/mnemonics.h
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@ -10,7 +10,7 @@
#ifndef MNEMONICS_H
#define MNEMONICS_H
const char *gMnemonics[1733] =
const char *gMnemonics[1734] =
{
"AAA", "AAD", "AADD", "AAM", "AAND", "AAS", "ADC", "ADCX", "ADD",
"ADDPD", "ADDPS", "ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX",
@ -118,101 +118,102 @@ const char *gMnemonics[1733] =
"PXOR", "RCL", "RCPPS", "RCPSS", "RCR", "RDFSBASE", "RDGSBASE",
"RDMSR", "RDMSRLIST", "RDPID", "RDPKRU", "RDPMC", "RDPRU", "RDRAND",
"RDSEED", "RDSHR", "RDSSPD", "RDSSPQ", "RDTSC", "RDTSCP", "RETF",
"RETN", "RMPADJUST", "RMPUPDATE", "ROL", "ROR", "RORX", "ROUNDPD",
"ROUNDPS", "ROUNDSD", "ROUNDSS", "RSDC", "RSLDT", "RSM", "RSQRTPS",
"RSQRTSS", "RSTORSSP", "RSTS", "SAHF", "SAL", "SALC", "SAR",
"SARX", "SAVEPREVSSP", "SBB", "SCASB", "SCASD", "SCASQ", "SCASW",
"SEAMCALL", "SEAMOPS", "SEAMRET", "SENDUIPI", "SERIALIZE", "SETBE",
"SETC", "SETL", "SETLE", "SETNBE", "SETNC", "SETNL", "SETNLE",
"SETNO", "SETNP", "SETNS", "SETNZ", "SETO", "SETP", "SETS", "SETSSBSY",
"SETZ", "SFENCE", "SGDT", "SHA1MSG1", "SHA1MSG2", "SHA1NEXTE",
"SHA1RNDS4", "SHA256MSG1", "SHA256MSG2", "SHA256RNDS2", "SHL",
"SHLD", "SHLX", "SHR", "SHRD", "SHRX", "SHUFPD", "SHUFPS", "SIDT",
"SKINIT", "SLDT", "SLWPCB", "SMINT", "SMSW", "SPFLT", "SQRTPD",
"SQRTPS", "SQRTSD", "SQRTSS", "STAC", "STC", "STD", "STGI", "STI",
"STMXCSR", "STOSB", "STOSD", "STOSQ", "STOSW", "STR", "STTILECFG",
"STUI", "SUB", "SUBPD", "SUBPS", "SUBSD", "SUBSS", "SVDC", "SVLDT",
"SVTS", "SWAPGS", "SYSCALL", "SYSENTER", "SYSEXIT", "SYSRET",
"T1MSKC", "TDCALL", "TDPBF16PS", "TDPBSSD", "TDPBSUD", "TDPBUSD",
"TDPBUUD", "TDPFP16PS", "TEST", "TESTUI", "TILELOADD", "TILELOADDT1",
"TILERELEASE", "TILESTORED", "TILEZERO", "TLBSYNC", "TPAUSE",
"TZCNT", "TZMSK", "UCOMISD", "UCOMISS", "UD0", "UD1", "UD2",
"UIRET", "UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS", "UNPCKLPD",
"UNPCKLPS", "V4FMADDPS", "V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS",
"VADDPD", "VADDPH", "VADDPS", "VADDSD", "VADDSH", "VADDSS", "VADDSUBPD",
"VADDSUBPS", "VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST",
"VAESIMC", "VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD",
"VANDNPS", "VANDPD", "VANDPS", "VBCSTNEBF162PS", "VBCSTNESH2PS",
"VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS", "VBLENDVPD",
"VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2", "VBROADCASTF32X4",
"VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4", "VBROADCASTI128",
"VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8", "VBROADCASTI64X2",
"VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS", "VCMPPD",
"VCMPPH", "VCMPPS", "VCMPSD", "VCMPSH", "VCMPSS", "VCOMISD",
"VCOMISH", "VCOMISS", "VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD",
"VCVTDQ2PH", "VCVTDQ2PS", "VCVTNE2PS2BF16", "VCVTNEEBF162PS",
"VCVTNEEPH2PS", "VCVTNEOBF162PS", "VCVTNEOPH2PS", "VCVTNEPS2BF16",
"VCVTPD2DQ", "VCVTPD2PH", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ",
"VCVTPD2UQQ", "VCVTPH2DQ", "VCVTPH2PD", "VCVTPH2PS", "VCVTPH2PSX",
"VCVTPH2QQ", "VCVTPH2UDQ", "VCVTPH2UQQ", "VCVTPH2UW", "VCVTPH2W",
"VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH", "VCVTPS2PHX", "VCVTPS2QQ",
"VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD", "VCVTQQ2PH", "VCVTQQ2PS",
"VCVTSD2SH", "VCVTSD2SI", "VCVTSD2SS", "VCVTSD2USI", "VCVTSH2SD",
"VCVTSH2SI", "VCVTSH2SS", "VCVTSH2USI", "VCVTSI2SD", "VCVTSI2SH",
"VCVTSI2SS", "VCVTSS2SD", "VCVTSS2SH", "VCVTSS2SI", "VCVTSS2USI",
"VCVTTPD2DQ", "VCVTTPD2QQ", "VCVTTPD2UDQ", "VCVTTPD2UQQ", "VCVTTPH2DQ",
"VCVTTPH2QQ", "VCVTTPH2UDQ", "VCVTTPH2UQQ", "VCVTTPH2UW", "VCVTTPH2W",
"VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ", "VCVTTPS2UQQ", "VCVTTSD2SI",
"VCVTTSD2USI", "VCVTTSH2SI", "VCVTTSH2USI", "VCVTTSS2SI", "VCVTTSS2USI",
"VCVTUDQ2PD", "VCVTUDQ2PH", "VCVTUDQ2PS", "VCVTUQQ2PD", "VCVTUQQ2PH",
"VCVTUQQ2PS", "VCVTUSI2SD", "VCVTUSI2SH", "VCVTUSI2SS", "VCVTUW2PH",
"VCVTW2PH", "VDBPSADBW", "VDIVPD", "VDIVPH", "VDIVPS", "VDIVSD",
"VDIVSH", "VDIVSS", "VDPBF16PS", "VDPPD", "VDPPS", "VERR", "VERW",
"VEXP2PD", "VEXP2PS", "VEXPANDPD", "VEXPANDPS", "VEXTRACTF128",
"VEXTRACTF32X4", "VEXTRACTF32X8", "VEXTRACTF64X2", "VEXTRACTF64X4",
"VEXTRACTI128", "VEXTRACTI32X4", "VEXTRACTI32X8", "VEXTRACTI64X2",
"VEXTRACTI64X4", "VEXTRACTPS", "VFCMADDCPH", "VFCMADDCSH", "VFCMULCPH",
"VFCMULCSH", "VFIXUPIMMPD", "VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS",
"VFMADD132PD", "VFMADD132PH", "VFMADD132PS", "VFMADD132SD", "VFMADD132SH",
"VFMADD132SS", "VFMADD213PD", "VFMADD213PH", "VFMADD213PS", "VFMADD213SD",
"VFMADD213SH", "VFMADD213SS", "VFMADD231PD", "VFMADD231PH", "VFMADD231PS",
"VFMADD231SD", "VFMADD231SH", "VFMADD231SS", "VFMADDCPH", "VFMADDCSH",
"VFMADDPD", "VFMADDPS", "VFMADDSD", "VFMADDSS", "VFMADDSUB132PD",
"VFMADDSUB132PH", "VFMADDSUB132PS", "VFMADDSUB213PD", "VFMADDSUB213PH",
"VFMADDSUB213PS", "VFMADDSUB231PD", "VFMADDSUB231PH", "VFMADDSUB231PS",
"VFMADDSUBPD", "VFMADDSUBPS", "VFMSUB132PD", "VFMSUB132PH", "VFMSUB132PS",
"VFMSUB132SD", "VFMSUB132SH", "VFMSUB132SS", "VFMSUB213PD", "VFMSUB213PH",
"VFMSUB213PS", "VFMSUB213SD", "VFMSUB213SH", "VFMSUB213SS", "VFMSUB231PD",
"VFMSUB231PH", "VFMSUB231PS", "VFMSUB231SD", "VFMSUB231SH", "VFMSUB231SS",
"VFMSUBADD132PD", "VFMSUBADD132PH", "VFMSUBADD132PS", "VFMSUBADD213PD",
"VFMSUBADD213PH", "VFMSUBADD213PS", "VFMSUBADD231PD", "VFMSUBADD231PH",
"VFMSUBADD231PS", "VFMSUBADDPD", "VFMSUBADDPS", "VFMSUBPD", "VFMSUBPS",
"VFMSUBSD", "VFMSUBSS", "VFMULCPH", "VFMULCSH", "VFNMADD132PD",
"VFNMADD132PH", "VFNMADD132PS", "VFNMADD132SD", "VFNMADD132SH",
"VFNMADD132SS", "VFNMADD213PD", "VFNMADD213PH", "VFNMADD213PS",
"VFNMADD213SD", "VFNMADD213SH", "VFNMADD213SS", "VFNMADD231PD",
"VFNMADD231PH", "VFNMADD231PS", "VFNMADD231SD", "VFNMADD231SH",
"VFNMADD231SS", "VFNMADDPD", "VFNMADDPS", "VFNMADDSD", "VFNMADDSS",
"VFNMSUB132PD", "VFNMSUB132PH", "VFNMSUB132PS", "VFNMSUB132SD",
"VFNMSUB132SH", "VFNMSUB132SS", "VFNMSUB213PD", "VFNMSUB213PH",
"VFNMSUB213PS", "VFNMSUB213SD", "VFNMSUB213SH", "VFNMSUB213SS",
"VFNMSUB231PD", "VFNMSUB231PH", "VFNMSUB231PS", "VFNMSUB231SD",
"VFNMSUB231SH", "VFNMSUB231SS", "VFNMSUBPD", "VFNMSUBPS", "VFNMSUBSD",
"VFNMSUBSS", "VFPCLASSPD", "VFPCLASSPH", "VFPCLASSPS", "VFPCLASSSD",
"VFPCLASSSH", "VFPCLASSSS", "VFRCZPD", "VFRCZPS", "VFRCZSD",
"VFRCZSS", "VGATHERDPD", "VGATHERDPS", "VGATHERPF0DPD", "VGATHERPF0DPS",
"VGATHERPF0QPD", "VGATHERPF0QPS", "VGATHERPF1DPD", "VGATHERPF1DPS",
"VGATHERPF1QPD", "VGATHERPF1QPS", "VGATHERQPD", "VGATHERQPS",
"VGETEXPPD", "VGETEXPPH", "VGETEXPPS", "VGETEXPSD", "VGETEXPSH",
"VGETEXPSS", "VGETMANTPD", "VGETMANTPH", "VGETMANTPS", "VGETMANTSD",
"VGETMANTSH", "VGETMANTSS", "VGF2P8AFFINEINVQB", "VGF2P8AFFINEQB",
"VGF2P8MULB", "VHADDPD", "VHADDPS", "VHSUBPD", "VHSUBPS", "VINSERTF128",
"VINSERTF32X4", "VINSERTF32X8", "VINSERTF64X2", "VINSERTF64X4",
"VINSERTI128", "VINSERTI32X4", "VINSERTI32X8", "VINSERTI64X2",
"VINSERTI64X4", "VINSERTPS", "VLDDQU", "VLDMXCSR", "VMASKMOVDQU",
"VMASKMOVPD", "VMASKMOVPS", "VMAXPD", "VMAXPH", "VMAXPS", "VMAXSD",
"VMAXSH", "VMAXSS", "VMCALL", "VMCLEAR", "VMFUNC", "VMGEXIT",
"VMINPD", "VMINPH", "VMINPS", "VMINSD", "VMINSH", "VMINSS", "VMLAUNCH",
"RETN", "RMPADJUST", "RMPQUERY", "RMPUPDATE", "ROL", "ROR", "RORX",
"ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS", "RSDC", "RSLDT",
"RSM", "RSQRTPS", "RSQRTSS", "RSTORSSP", "RSTS", "SAHF", "SAL",
"SALC", "SAR", "SARX", "SAVEPREVSSP", "SBB", "SCASB", "SCASD",
"SCASQ", "SCASW", "SEAMCALL", "SEAMOPS", "SEAMRET", "SENDUIPI",
"SERIALIZE", "SETBE", "SETC", "SETL", "SETLE", "SETNBE", "SETNC",
"SETNL", "SETNLE", "SETNO", "SETNP", "SETNS", "SETNZ", "SETO",
"SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE", "SGDT", "SHA1MSG1",
"SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1", "SHA256MSG2",
"SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD", "SHRX",
"SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB", "SMINT",
"SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS", "STAC",
"STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD", "STOSQ",
"STOSW", "STR", "STTILECFG", "STUI", "SUB", "SUBPD", "SUBPS",
"SUBSD", "SUBSS", "SVDC", "SVLDT", "SVTS", "SWAPGS", "SYSCALL",
"SYSENTER", "SYSEXIT", "SYSRET", "T1MSKC", "TDCALL", "TDPBF16PS",
"TDPBSSD", "TDPBSUD", "TDPBUSD", "TDPBUUD", "TDPFP16PS", "TEST",
"TESTUI", "TILELOADD", "TILELOADDT1", "TILERELEASE", "TILESTORED",
"TILEZERO", "TLBSYNC", "TPAUSE", "TZCNT", "TZMSK", "UCOMISD",
"UCOMISS", "UD0", "UD1", "UD2", "UIRET", "UMONITOR", "UMWAIT",
"UNPCKHPD", "UNPCKHPS", "UNPCKLPD", "UNPCKLPS", "V4FMADDPS",
"V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS", "VADDPD", "VADDPH",
"VADDPS", "VADDSD", "VADDSH", "VADDSS", "VADDSUBPD", "VADDSUBPS",
"VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST", "VAESIMC",
"VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD", "VANDNPS",
"VANDPD", "VANDPS", "VBCSTNEBF162PS", "VBCSTNESH2PS", "VBLENDMPD",
"VBLENDMPS", "VBLENDPD", "VBLENDPS", "VBLENDVPD", "VBLENDVPS",
"VBROADCASTF128", "VBROADCASTF32X2", "VBROADCASTF32X4", "VBROADCASTF32X8",
"VBROADCASTF64X2", "VBROADCASTF64X4", "VBROADCASTI128", "VBROADCASTI32X2",
"VBROADCASTI32X4", "VBROADCASTI32X8", "VBROADCASTI64X2", "VBROADCASTI64X4",
"VBROADCASTSD", "VBROADCASTSS", "VCMPPD", "VCMPPH", "VCMPPS",
"VCMPSD", "VCMPSH", "VCMPSS", "VCOMISD", "VCOMISH", "VCOMISS",
"VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PH", "VCVTDQ2PS",
"VCVTNE2PS2BF16", "VCVTNEEBF162PS", "VCVTNEEPH2PS", "VCVTNEOBF162PS",
"VCVTNEOPH2PS", "VCVTNEPS2BF16", "VCVTPD2DQ", "VCVTPD2PH", "VCVTPD2PS",
"VCVTPD2QQ", "VCVTPD2UDQ", "VCVTPD2UQQ", "VCVTPH2DQ", "VCVTPH2PD",
"VCVTPH2PS", "VCVTPH2PSX", "VCVTPH2QQ", "VCVTPH2UDQ", "VCVTPH2UQQ",
"VCVTPH2UW", "VCVTPH2W", "VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH",
"VCVTPS2PHX", "VCVTPS2QQ", "VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD",
"VCVTQQ2PH", "VCVTQQ2PS", "VCVTSD2SH", "VCVTSD2SI", "VCVTSD2SS",
"VCVTSD2USI", "VCVTSH2SD", "VCVTSH2SI", "VCVTSH2SS", "VCVTSH2USI",
"VCVTSI2SD", "VCVTSI2SH", "VCVTSI2SS", "VCVTSS2SD", "VCVTSS2SH",
"VCVTSS2SI", "VCVTSS2USI", "VCVTTPD2DQ", "VCVTTPD2QQ", "VCVTTPD2UDQ",
"VCVTTPD2UQQ", "VCVTTPH2DQ", "VCVTTPH2QQ", "VCVTTPH2UDQ", "VCVTTPH2UQQ",
"VCVTTPH2UW", "VCVTTPH2W", "VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ",
"VCVTTPS2UQQ", "VCVTTSD2SI", "VCVTTSD2USI", "VCVTTSH2SI", "VCVTTSH2USI",
"VCVTTSS2SI", "VCVTTSS2USI", "VCVTUDQ2PD", "VCVTUDQ2PH", "VCVTUDQ2PS",
"VCVTUQQ2PD", "VCVTUQQ2PH", "VCVTUQQ2PS", "VCVTUSI2SD", "VCVTUSI2SH",
"VCVTUSI2SS", "VCVTUW2PH", "VCVTW2PH", "VDBPSADBW", "VDIVPD",
"VDIVPH", "VDIVPS", "VDIVSD", "VDIVSH", "VDIVSS", "VDPBF16PS",
"VDPPD", "VDPPS", "VERR", "VERW", "VEXP2PD", "VEXP2PS", "VEXPANDPD",
"VEXPANDPS", "VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8",
"VEXTRACTF64X2", "VEXTRACTF64X4", "VEXTRACTI128", "VEXTRACTI32X4",
"VEXTRACTI32X8", "VEXTRACTI64X2", "VEXTRACTI64X4", "VEXTRACTPS",
"VFCMADDCPH", "VFCMADDCSH", "VFCMULCPH", "VFCMULCSH", "VFIXUPIMMPD",
"VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS", "VFMADD132PD", "VFMADD132PH",
"VFMADD132PS", "VFMADD132SD", "VFMADD132SH", "VFMADD132SS", "VFMADD213PD",
"VFMADD213PH", "VFMADD213PS", "VFMADD213SD", "VFMADD213SH", "VFMADD213SS",
"VFMADD231PD", "VFMADD231PH", "VFMADD231PS", "VFMADD231SD", "VFMADD231SH",
"VFMADD231SS", "VFMADDCPH", "VFMADDCSH", "VFMADDPD", "VFMADDPS",
"VFMADDSD", "VFMADDSS", "VFMADDSUB132PD", "VFMADDSUB132PH", "VFMADDSUB132PS",
"VFMADDSUB213PD", "VFMADDSUB213PH", "VFMADDSUB213PS", "VFMADDSUB231PD",
"VFMADDSUB231PH", "VFMADDSUB231PS", "VFMADDSUBPD", "VFMADDSUBPS",
"VFMSUB132PD", "VFMSUB132PH", "VFMSUB132PS", "VFMSUB132SD", "VFMSUB132SH",
"VFMSUB132SS", "VFMSUB213PD", "VFMSUB213PH", "VFMSUB213PS", "VFMSUB213SD",
"VFMSUB213SH", "VFMSUB213SS", "VFMSUB231PD", "VFMSUB231PH", "VFMSUB231PS",
"VFMSUB231SD", "VFMSUB231SH", "VFMSUB231SS", "VFMSUBADD132PD",
"VFMSUBADD132PH", "VFMSUBADD132PS", "VFMSUBADD213PD", "VFMSUBADD213PH",
"VFMSUBADD213PS", "VFMSUBADD231PD", "VFMSUBADD231PH", "VFMSUBADD231PS",
"VFMSUBADDPD", "VFMSUBADDPS", "VFMSUBPD", "VFMSUBPS", "VFMSUBSD",
"VFMSUBSS", "VFMULCPH", "VFMULCSH", "VFNMADD132PD", "VFNMADD132PH",
"VFNMADD132PS", "VFNMADD132SD", "VFNMADD132SH", "VFNMADD132SS",
"VFNMADD213PD", "VFNMADD213PH", "VFNMADD213PS", "VFNMADD213SD",
"VFNMADD213SH", "VFNMADD213SS", "VFNMADD231PD", "VFNMADD231PH",
"VFNMADD231PS", "VFNMADD231SD", "VFNMADD231SH", "VFNMADD231SS",
"VFNMADDPD", "VFNMADDPS", "VFNMADDSD", "VFNMADDSS", "VFNMSUB132PD",
"VFNMSUB132PH", "VFNMSUB132PS", "VFNMSUB132SD", "VFNMSUB132SH",
"VFNMSUB132SS", "VFNMSUB213PD", "VFNMSUB213PH", "VFNMSUB213PS",
"VFNMSUB213SD", "VFNMSUB213SH", "VFNMSUB213SS", "VFNMSUB231PD",
"VFNMSUB231PH", "VFNMSUB231PS", "VFNMSUB231SD", "VFNMSUB231SH",
"VFNMSUB231SS", "VFNMSUBPD", "VFNMSUBPS", "VFNMSUBSD", "VFNMSUBSS",
"VFPCLASSPD", "VFPCLASSPH", "VFPCLASSPS", "VFPCLASSSD", "VFPCLASSSH",
"VFPCLASSSS", "VFRCZPD", "VFRCZPS", "VFRCZSD", "VFRCZSS", "VGATHERDPD",
"VGATHERDPS", "VGATHERPF0DPD", "VGATHERPF0DPS", "VGATHERPF0QPD",
"VGATHERPF0QPS", "VGATHERPF1DPD", "VGATHERPF1DPS", "VGATHERPF1QPD",
"VGATHERPF1QPS", "VGATHERQPD", "VGATHERQPS", "VGETEXPPD", "VGETEXPPH",
"VGETEXPPS", "VGETEXPSD", "VGETEXPSH", "VGETEXPSS", "VGETMANTPD",
"VGETMANTPH", "VGETMANTPS", "VGETMANTSD", "VGETMANTSH", "VGETMANTSS",
"VGF2P8AFFINEINVQB", "VGF2P8AFFINEQB", "VGF2P8MULB", "VHADDPD",
"VHADDPS", "VHSUBPD", "VHSUBPS", "VINSERTF128", "VINSERTF32X4",
"VINSERTF32X8", "VINSERTF64X2", "VINSERTF64X4", "VINSERTI128",
"VINSERTI32X4", "VINSERTI32X8", "VINSERTI64X2", "VINSERTI64X4",
"VINSERTPS", "VLDDQU", "VLDMXCSR", "VMASKMOVDQU", "VMASKMOVPD",
"VMASKMOVPS", "VMAXPD", "VMAXPH", "VMAXPS", "VMAXSD", "VMAXSH",
"VMAXSS", "VMCALL", "VMCLEAR", "VMFUNC", "VMGEXIT", "VMINPD",
"VMINPH", "VMINPS", "VMINSD", "VMINSH", "VMINSS", "VMLAUNCH",
"VMLOAD", "VMMCALL", "VMOVAPD", "VMOVAPS", "VMOVD", "VMOVDDUP",
"VMOVDQA", "VMOVDQA32", "VMOVDQA64", "VMOVDQU", "VMOVDQU16",
"VMOVDQU32", "VMOVDQU64", "VMOVDQU8", "VMOVHLPS", "VMOVHPD",

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bddisasm/include/table_evex.h
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bddisasm/include/table_root.h
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bddisasm/include/table_vex.h
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bddisasm/include/table_xop.h
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@ -339,13 +339,13 @@ const ND_TABLE_INSTRUCTION gXopTable_root_09_01_06_leaf =
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_07_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1358]
(const void *)&gInstructions[1359]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_04_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1383]
(const void *)&gInstructions[1384]
};
const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
@ -399,7 +399,7 @@ const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_00_leaf =
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1309]
(const void *)&gInstructions[1310]
};
const ND_TABLE_MODRM_REG gXopTable_root_09_12_reg_modrmreg =
@ -429,127 +429,127 @@ const ND_TABLE_MODRM_MOD gXopTable_root_09_12_modrmmod =
const ND_TABLE_INSTRUCTION gXopTable_root_09_81_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1821]
(const void *)&gInstructions[1822]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_80_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1822]
(const void *)&gInstructions[1823]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_83_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1823]
(const void *)&gInstructions[1824]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_82_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1824]
(const void *)&gInstructions[1825]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2242]
(const void *)&gInstructions[2243]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2243]
(const void *)&gInstructions[2244]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2244]
(const void *)&gInstructions[2245]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_cb_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2246]
(const void *)&gInstructions[2247]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2248]
(const void *)&gInstructions[2249]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2249]
(const void *)&gInstructions[2250]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2250]
(const void *)&gInstructions[2251]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_db_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2251]
(const void *)&gInstructions[2252]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2252]
(const void *)&gInstructions[2253]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d7_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2253]
(const void *)&gInstructions[2254]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2255]
(const void *)&gInstructions[2256]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c7_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2256]
(const void *)&gInstructions[2257]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2258]
(const void *)&gInstructions[2259]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2260]
(const void *)&gInstructions[2261]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2263]
(const void *)&gInstructions[2264]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2427]
(const void *)&gInstructions[2428]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2428]
(const void *)&gInstructions[2429]
};
const ND_TABLE_VEX_W gXopTable_root_09_90_w =
@ -564,13 +564,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_90_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2430]
(const void *)&gInstructions[2431]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2431]
(const void *)&gInstructions[2432]
};
const ND_TABLE_VEX_W gXopTable_root_09_92_w =
@ -585,13 +585,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_92_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2433]
(const void *)&gInstructions[2434]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2434]
(const void *)&gInstructions[2435]
};
const ND_TABLE_VEX_W gXopTable_root_09_93_w =
@ -606,13 +606,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_93_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2436]
(const void *)&gInstructions[2437]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2437]
(const void *)&gInstructions[2438]
};
const ND_TABLE_VEX_W gXopTable_root_09_91_w =
@ -627,13 +627,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_91_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2444]
(const void *)&gInstructions[2445]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2445]
(const void *)&gInstructions[2446]
};
const ND_TABLE_VEX_W gXopTable_root_09_98_w =
@ -648,13 +648,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_98_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2446]
(const void *)&gInstructions[2447]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2447]
(const void *)&gInstructions[2448]
};
const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
@ -669,13 +669,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2448]
(const void *)&gInstructions[2449]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2449]
(const void *)&gInstructions[2450]
};
const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
@ -690,13 +690,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2450]
(const void *)&gInstructions[2451]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2451]
(const void *)&gInstructions[2452]
};
const ND_TABLE_VEX_W gXopTable_root_09_99_w =
@ -711,13 +711,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_99_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2452]
(const void *)&gInstructions[2453]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2453]
(const void *)&gInstructions[2454]
};
const ND_TABLE_VEX_W gXopTable_root_09_94_w =
@ -732,13 +732,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_94_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2454]
(const void *)&gInstructions[2455]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2465]
(const void *)&gInstructions[2466]
};
const ND_TABLE_VEX_W gXopTable_root_09_95_w =
@ -753,13 +753,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_95_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2455]
(const void *)&gInstructions[2456]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2456]
(const void *)&gInstructions[2457]
};
const ND_TABLE_VEX_W gXopTable_root_09_96_w =
@ -774,13 +774,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_96_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2463]
(const void *)&gInstructions[2464]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2464]
(const void *)&gInstructions[2465]
};
const ND_TABLE_VEX_W gXopTable_root_09_97_w =
@ -1058,13 +1058,13 @@ const ND_TABLE_OPCODE gXopTable_root_09_opcode =
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2114]
(const void *)&gInstructions[2115]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2115]
(const void *)&gInstructions[2116]
};
const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
@ -1079,133 +1079,133 @@ const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
const ND_TABLE_INSTRUCTION gXopTable_root_08_cc_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2144]
(const void *)&gInstructions[2145]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ce_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2145]
(const void *)&gInstructions[2146]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_cf_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2150]
(const void *)&gInstructions[2151]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ec_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2151]
(const void *)&gInstructions[2152]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ee_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2152]
(const void *)&gInstructions[2153]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ef_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2153]
(const void *)&gInstructions[2154]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ed_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2154]
(const void *)&gInstructions[2155]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_cd_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2155]
(const void *)&gInstructions[2156]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_9e_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2278]
(const void *)&gInstructions[2279]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_9f_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2279]
(const void *)&gInstructions[2280]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_97_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2280]
(const void *)&gInstructions[2281]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_8e_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2281]
(const void *)&gInstructions[2282]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_8f_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2282]
(const void *)&gInstructions[2283]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_87_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2283]
(const void *)&gInstructions[2284]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_86_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2284]
(const void *)&gInstructions[2285]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_85_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2285]
(const void *)&gInstructions[2286]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_96_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2286]
(const void *)&gInstructions[2287]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_95_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2287]
(const void *)&gInstructions[2288]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2288]
(const void *)&gInstructions[2289]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_b6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2289]
(const void *)&gInstructions[2290]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2416]
(const void *)&gInstructions[2417]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2417]
(const void *)&gInstructions[2418]
};
const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
@ -1220,25 +1220,25 @@ const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
const ND_TABLE_INSTRUCTION gXopTable_root_08_c0_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2426]
(const void *)&gInstructions[2427]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2429]
(const void *)&gInstructions[2430]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2432]
(const void *)&gInstructions[2433]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2435]
(const void *)&gInstructions[2436]
};
const ND_TABLE_OPCODE gXopTable_root_08_opcode =

3
bddisasm_test/x86/basic/snp_64.asm
View File

@ -3,4 +3,5 @@
rmpadjust
rmpupdate
psmash
pvalidate
pvalidate
rmpquery

22
bddisasm_test/x86/basic/snp_64.result
View File

@ -78,3 +78,25 @@
Operand: 2, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 2, RegCount: 1
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000010 f30f01fd RMPQUERY
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: SNP, Ins cat: SYSTEM, CET tracked: no
CPUID leaf: 0x8000001f, reg: eax, bit: 6
FLAGS access
PF: m, AF: m, ZF: m, SF: m, OF: m,
Valid modes
R0: yes, R1: no, R2: no, R3: no
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 1, RawSize: 1, Encoding: S,
Segment: 3, Base: 0,
Operand: 1, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
Operand: 3, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 2, RegCount: 1
Operand: 4, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1

2
bddisasm_test/x86/basic/snp_64.test
View File

@ -1 +1 @@
<EFBFBD><01><><01><><01><><01>
<EFBFBD><01><><01><><01><><01><EFBFBD><01>

2
bindings/pybddisasm/setup.py
View File

@ -12,7 +12,7 @@ from setuptools import find_packages, setup, Command, Extension, Distribution
from codecs import open
VERSION = (0, 1, 3)
LIBRARY_VERSION = (1, 35, 0)
LIBRARY_VERSION = (1, 36, 0)
LIBRARY_INSTRUX_SIZE = 856
packages = ['pybddisasm']

1
disasmtool_lix/dumpers.cpp
View File

@ -1585,6 +1585,7 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
case ND_INS_VPDPBUUDS: return "vpdpbuuds";
case ND_INS_WRMSRLIST: return "wrmsrlist";
case ND_INS_WRMSRNS: return "wrmsrns";
case ND_INS_RMPQUERY: return "rmpquery";
default: return "unhandled!";
}

1
inc/constants.h
View File

@ -640,6 +640,7 @@ typedef enum _ND_INS_CLASS
ND_INS_RETF,
ND_INS_RETN,
ND_INS_RMPADJUST,
ND_INS_RMPQUERY,
ND_INS_RMPUPDATE,
ND_INS_ROL,
ND_INS_ROR,

1
inc/cpuidflags.h
View File

@ -128,5 +128,6 @@
#define ND_CFF_RDPRU ND_CFF(0x80000008, 0xFFFFFFFF, NDR_EBX, 4)
#define ND_CFF_MCOMMIT ND_CFF(0x80000008, 0xFFFFFFFF, NDR_EBX, 8)
#define ND_CFF_SNP ND_CFF(0x8000001F, 0xFFFFFFFF, NDR_EAX, 4)
#define ND_CFF_RMPQUERY ND_CFF(0x8000001F, 0xFFFFFFFF, NDR_EAX, 6)
#endif // CPUID_FLAGS_H

2
inc/version.h
View File

@ -6,7 +6,7 @@
#define DISASM_VER_H
#define DISASM_VERSION_MAJOR 1
#define DISASM_VERSION_MINOR 35
#define DISASM_VERSION_MINOR 36
#define DISASM_VERSION_REVISION 0
// bdshemu depends on bddisasm. It cannot be used without it.

1
isagenerator/instructions/cpuid.dat
View File

@ -135,3 +135,4 @@ MCOMMIT : 0x80000008, 0xFFFFFFFF, EBX, 8
SNP : 0x8000001F, 0xFFFFFFFF, EAX, 4
RMPQUERY : 0x8000001F, 0xFFFFFFFF, EAX, 6

1
isagenerator/instructions/table_0F.dat
View File

@ -76,6 +76,7 @@ MCOMMIT nil Fv [ 0xF3 0x0F 0x01 /0
MWAITX nil EAX,ECX,EBX [ NP 0x0F 0x01 /0xFB] s:MWAITT, t:SYSTEM, w:R|R|R, m:KERNEL|NOV86
CLZERO nil rAX [ 0x0F 0x01 /0xFC] s:CLZERO, t:MISC, w:R
RDPRU nil EAX,EDX,ECX,Fv [ 0x0F 0x01 /0xFD] s:RDPRU, t:MISC, w:W|W|R|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
RMPQUERY nil pAXb,EAX,RCX,RDX,Fv [ 0xF3 0x0F 0x01 /0xFD] s:SNP, t:SYSTEM, w:R|RW|W|RW|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL, i:RMPQUERY
INVLPGB nil rAX,ECX,EDX [ 0x0F 0x01 /0xFE] s:INVLPGB, t:SYSTEM, w:R|R|R, m:NOREAL|KERNEL
RMPADJUST nil pAXb,EAX,RCX,RDX,Fv [ 0xF3 0x0F 0x01 /0xFE] s:SNP, t:SYSTEM, w:R|RW|R|R|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL
RMPUPDATE nil RAX,pCXdq,Fv [ 0xF2 0x0F 0x01 /0xFE] s:SNP, t:SYSTEM, w:RW|R|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL