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bddisasm
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8 Commits (master)

Author SHA1 Message Date
Andrei Vlad LUTAS 37a8c94bc7 Applied some of the syntax recomandations from https://cdrdv2.intel.com/v1/dl/getContent/817241.
3 months ago
Andrei Vlad LUTAS 02cbe6a298 https://github.com/bitdefender/bddisasm/issues/87 - added missing `R` access for the `rIP` operand for `SYSCALL` instructions; added missing `SCS`, `rCX` and `rDX` operands for `SYSEXIT` instruction.
3 months ago
Andrei Vlad LUTAS 3df189f093 https://github.com/bitdefender/bddisasm/issues/87 - Fixed `CALL` instruction access for `rIP` operand - it must include read access, as the instruction pointer is saved on the stack.
3 months ago
Andrei Vlad LUTAS fad9c7e35c BDDISASM v2.1.0 release - please consult the CHANGELOG for details about the modifications.
3 months ago
Andrei Vlad LUTAS f53cbc51e2 Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
10 months ago
BITDEFENDER\vlutas 124521beb5 Added support for Intel AMX-COMPLEX instructions.
1 year ago
BITDEFENDER\vlutas 7a254037b0 Added support for AMD RMPQUERY instruction.
2 years ago
BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
2 years ago