50 Commits

Author	SHA1	Message	Date
cepetr	04d5017228	feat(core): improve loader haptic effect ... [no changelog]	2024-05-09 14:51:05 +02:00
tychovrahe	8ebb8c2128	fix(core): fix prodtest WIPE on STM32U5 ... [no changelog]	2024-05-05 18:36:47 +02:00
tychovrahe	e5e40cf4a8	fix(core): ensure correctly programmed oem key option bytes ... [no changelog]	2024-04-22 09:15:42 +02:00
tychovrahe	916dbdff9c	fix(core): fix reboot to bootloader crash when display copying is in progress ... [no changelog]	2024-04-18 10:50:46 +02:00
tychovrahe	457e5956c8	fix(core): fix sha256 calculation with hash processor ... [no changelog]	2024-04-17 10:48:37 +02:00
tychovrahe	72146c2ae2	fix(core): fix display fatal error screen ... [no changelog]	2024-04-11 19:16:23 +02:00
tychovrahe	1600759457	refactor(core): simplify secret.h api, hide platform differences ... [no changelog]	2024-04-11 16:13:58 +02:00
tychovrahe	89c6590e45	feat(core/prodtest): add commands TOUCH VERSION and VARIANT READ ... [no changelog]	2024-04-11 10:05:13 +02:00
tychovrahe	c8e18dd4d2	fix(core): slow down SDIO communication in T3T1 prodtest ... [no changelog]	2024-04-11 09:54:28 +02:00
tychovrahe	8a18cfe0d4	feat(core): use U5 DHUK to encrypt optiga pairing secret in flash ... [no changelog]	2024-04-08 21:41:30 +02:00
tychovrahe	e060ac68c5	feat(core): use U5 HW keys to additionally encrypt storage items ... [no changelog]	2024-04-08 21:41:30 +02:00
tychovrahe	ed6aa48726	feat(core): use confidential section for confidential and sensitive data ... [no changelog]	2024-04-05 18:54:30 +02:00
tychovrahe	ba741b81fd	feat(core): use HSI as PLL source on T3T1 ... [no changelog]	2024-04-05 15:17:42 +02:00
tychovrahe	ba065c5b38	fix(core/prodtest): do not require sd detect pin for running SD card test ... [no changelog]	2024-04-03 16:48:28 +02:00
Pavol Rusnak	4b189eb2cb	fix(core): always zero-initialize structures in trezorhal ... [no changelog]	2024-04-03 13:08:16 +02:00
tychovrahe	576ed7e04e	chore(core): use SD hal driver from submodule ... [no changelog]	2024-04-03 13:08:16 +02:00
tychovrahe	69ed626ca0	fix(core): slowdown i2c on u5 to 200kHz ... [no changelog]	2024-04-03 11:01:35 +02:00
tychovrahe	89147ef493	refactor(core): improve flash api by introducing flash_area_write_data function ... [no changelog]	2024-04-03 10:18:40 +02:00
tychovrahe	39cfa7087a	fix(core): set proper GPIO speeds for T3T1 ... [no changelog]	2024-04-03 10:18:16 +02:00
tychovrahe	047c8a881b	fix(core): fix order of loading BHK into SAES key register ... [no changelog]	2024-03-28 13:02:17 +01:00
tychovrahe	a80959e50f	feat(core): allow T3T1 to start without touch during testing ... [no changelog]	2024-03-25 09:16:07 +01:00
tychovrahe	5e827e09c4	fix(core): fix haptic driver initialization ... [no changelog]	2024-03-25 08:35:02 +01:00
tychovrahe	70a673fabc	feat(core): use flash bursts for faster flashing ... [no changelog]	2024-03-19 13:17:25 +01:00
tychovrahe	6e2f5ff27d	fix(core): improve bhk handling on STM32U5 ... [no changelog]	2024-03-19 11:33:23 +01:00
tychovrahe	fb2868d297	fix(core): setup option bytes for STM32U5 ... [no changelog]	2024-03-19 11:33:23 +01:00
tychovrahe	4fe9294377	fix(core): fix prodtest mpu setting on U5 - allow read of MCU ID ... [no changelog]	2024-03-18 19:50:54 +01:00
tychovrahe	8ccd2cb048	feat(core): add support for T3T1 rev. E HW ... [no changelog]	2024-03-05 16:51:23 +01:00
tychovrahe	f08bed363d	refactor(core): extract framebuffer copy to separate bg_copy functionality ... [no changelog]	2024-02-29 23:40:17 +01:00
tychovrahe	afefc17478	refactor(core): use internal framebuffer on T3T1 (with ST7789V display controller) ... [no changelog]	2024-02-29 23:40:17 +01:00
tychovrahe	0e70fcdc6f	feat(core): add haptic to prodtest ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	8c1425edd5	perf(core): optimize boot time by removing unnecessary touch initialization delays	2024-02-29 23:05:56 +01:00
tychovrahe	30edad0151	perf(core): optimize i2c initialization on U5 by statically defining timing constant ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	c3f84e2949	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256 ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	5e4e398f64	chore(core): optimize flash usage - SD card on U5 ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	f83e33399f	chore(core): optimize flash usage - tamper on U5 ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	ce82f53010	feat(core): support SD card on STM32U5 ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	5106ac7aa3	feat(core): support optiga handling on U5 ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	72dc8f57e8	feat(core): add haptic feedback ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	a71a608ea7	feat(core): add basic support for T3T1	2024-02-29 23:05:56 +01:00
tychovrahe	7d7ccc9dde	chore(core): unify i2c instances numbering ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	834693a115	fix(core): fix OTP programming on U5 ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	cec0191360	fix(core): fix bootloader update on STM32U5 ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	8815e764d2	feat(core): add support for STM32U585 ... [no changelog]	2024-02-29 23:05:56 +01:00
cepetr	4cf781abb2	chore(core, legacy, storage): refactor flash drivers ... [no changelog]	2024-02-29 23:05:56 +01:00
cepetr	271bed8bf6	chore(core): use cortex-m33 stack protection	2024-02-29 23:05:56 +01:00
cepetr	7e427432ea	chore(core): refactor trustzone initialization ... [no changelog]	2024-02-29 23:05:56 +01:00
cepetr	b504baceda	chore(core): refactor mpu initialization ... [no changelog]	2024-02-29 23:05:56 +01:00
cepetr	c4c571d837	chore(core): refactor boot_args ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	353095ae95	feat(core): add support for STM32U5A9J-DK board ... [no changelog]	2024-02-29 23:05:56 +01:00
tychovrahe	8150636a81	feat(core): add basic support for STM32U5	2024-02-29 23:05:56 +01:00