BITDEFENDER\vlutas
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24665b0531
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Switched from nil to n/a naming for absent operands, as it is more obvious.
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1 year ago |
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BITDEFENDER\vlutas
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7a254037b0
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Added support for AMD RMPQUERY instruction.
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2 years ago |
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BITDEFENDER\vlutas
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9ba1e6a2f9
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.
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2 years ago |
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Andrei Vlad LUTAS
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fccf11915d
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Added support for Intel FRED and LKGS instructions.
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3 years ago |
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Andrei Vlad LUTAS
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58197cc518
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Removed support for PCOMMIT and CL1INVMB (not implemented by any x86/x64 CPUs), and marked MOV to/from test registers as being invalid in long mode.
Fixed https://github.com/bitdefender/bddisasm/issues/24
Fixed https://github.com/bitdefender/bddisasm/issues/25
Fixed https://github.com/bitdefender/bddisasm/issues/26
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4 years ago |
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Andrei Vlad LUTAS
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9652450125
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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4 years ago |
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Andrei Vlad LUTAS
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4f8b030ddd
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Added support for Intel Key Locker instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-key-locker-specification.html.
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4 years ago |
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Andrei Vlad LUTAS
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52ed638c13
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Fixed some typos.
Added SECURITY.md file.
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4 years ago |
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Andrei Vlad LUTAS
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8392c97f97
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Use the documented byte granularity for cache-line accesses.
Fixed CET CPUID feature flag - split into CET_SS and CET_IBT.
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4 years ago |
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Andrei Vlad LUTAS
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698ba367a1
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Initial commit.
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4 years ago |
