298 Commits

Author	SHA1	Message	Date
Ondrej Mikle	daa94ac941	fix(legacy): make RDI work on T1	2021-06-24 17:34:24 +02:00
Ondřej Vejpustek	b8b0ae09d9	fix(core): use unprivileged shutdown where needed	2021-06-23 16:40:45 +02:00
Ondřej Vejpustek	5984fd6ad7	feat(core): jump to unprivileged mode after shutdown	2021-06-23 16:40:45 +02:00
Ondřej Vejpustek	40b4f679f9	feat(core): implement wrapper for svc_shutdown	2021-06-23 16:40:45 +02:00
Ondřej Vejpustek	311288407e	docs(core): document shutdown_privileged	2021-06-23 16:40:45 +02:00
Ondřej Vejpustek	4968d7da53	feat(core): implement svc shutdown	2021-06-23 16:40:45 +02:00
Ondřej Vejpustek	cca9d4b1c4	refactor(core): rename shutdown to shutdown_privileged	2021-06-23 16:40:45 +02:00
Ondřej Vejpustek	7686eb355a	fix(core): fix import of random delays	2021-06-23 16:40:45 +02:00
Pavol Rusnak	69d1465e08	refactor(core): pass invert_colors to send_init_seq_ST7789V as argument ... to make the call more flexible	2021-06-19 19:57:42 +02:00
Pavol Rusnak	18e103bb94	style(core): refactor style of display-stm32_T	2021-06-19 19:54:19 +02:00
matejcik	c06a93cba5	feat(core/rust): propagate bitcoin_only flag to Rust build	2021-06-08 09:55:19 +02:00
Jan Pochyla	8a21e3fc73	feat(core): Add Rust Protobuf codec	2021-06-08 09:55:19 +02:00
Pavol Rusnak	23aa69caea	fix(core): unify Features.revision reporting with legacy	2021-06-04 12:50:49 +02:00
Martin Milata	ca836b2e45	chore(core): bump version to 2.4.1	2021-06-02 12:50:22 +02:00
Martin Milata	8c6b93e0bd	build(core): account for ARM unwinding info in memory layout ... Currently the 8-byte section is inserted under semi-random name like .ARM.exidx.text._ZN50_$LT$T$u20$as$u20$core..convert..Into$LT$U$GT$$GT$4into17h79ccbc4bdfe3f200E. This makes it hard to include it in _codelen that is later baked into firmware header. This change adds new section because including it in .flash causes linker error due to mixing "ordered" and "unordered" sections. By renaming .exidx to /DISCARD/ we'd drop this info, there may also exist compiler flag to do that.	2021-05-21 13:49:42 +02:00
Martin Milata	20fe8552ca	build(core/rust): use correct architecture for T1 ... TT is Cortex-M4 is Armv7E-M while T1 is Cortex-M3 is Armv7-M: https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv6-m-vs-armv7-m---unpacking-the-microcontrollers	2021-05-21 13:49:42 +02:00
Ondřej Vejpustek	6fd4739c5c	feat(core): make random delays use chacha_drbg	2021-05-21 13:42:53 +02:00
Ondřej Vejpustek	e1a5f42c81	feat(core): make chacha_drbg more robust	2021-05-21 13:42:53 +02:00
Ondřej Vejpustek	8ee17f69b3	refactor(core): move wait_random and rdi into separate file	2021-05-21 13:42:53 +02:00
matejcik	e015bc0856	build(core/rust): disable nightly-only features ... When we need them, we will re-enable.	2021-05-21 13:42:10 +02:00
matejcik	5f4240d93c	feat(core): preallocate sys.modules to an appropriate size	2021-05-06 13:14:21 +02:00
matejcik	391976bcda	refactor(core/usb): do not require serial number on instantiaton of USB ... On a cleanly wiped device, storage must be unlocked in order to create and retrieve the serial number. However, storage unlocking happens in boot.py, which is imported _after_ usb.py We must therefore sidestep asking for the serial number.	2021-05-06 13:14:21 +02:00
Jan Pochyla	6257584951	feat(core): Add Rust bindings to MicroPython and trezorhal ... core: Remove dangling module decls core: Use new Cargo feature resolver, use external MacOS debug info core: Rust docs improvements core: Upgrade bindgen core: Add test target to Rust ci: build rust sources build(core): .ARM.exidx.text.__aeabi_ui2f in t1 firmware size It's an unwind table for softfloat function inserted by rustc, probably can be removed to save 8 bytes: 599c58db70/link.x.in (L175-L182) scons: Remove dead code core: Move Rust target to build/rust core: Replace extern with a FFI version core: Add some explanatory Rust comments core: Use correct path for the Rust lib core: Remove Buffer::as_mut() Mutable buffer access needs MP_BUFFER_WRITE flag. TBD in the Protobuf PR. core: Improve docs for micropython::Buffer core: Minor Rust docs changes core: Rewrite trezor_obj_get_ll_checked core: Fix incorrect doc comment core: Remove cc from deps fixup! core: Rewrite trezor_obj_get_ll_checked core: update safety comments	2021-05-05 16:00:21 +02:00
mcudev	e3539b0a73	core/embed/usb: add back usb fs code for t1 and redo fifo sizing	2021-04-14 23:03:29 +02:00
mcudev	6137a55b06	core/embed/usb: use all available usb endpoints and update the usb fifo sizing	2021-04-09 12:50:40 +02:00
Martin Milata	ac711fb8ee	style(core): use more recent type annotation syntax ... https://www.python.org/dev/peps/pep-0585/ - Type Hinting Generics In Standard Collections https://www.python.org/dev/peps/pep-0604/ - Allow writing union types as X | Y	2021-04-01 11:12:30 +02:00
Martin Milata	8b3ac659a0	style(core): mypy: disable implicit Optional for function arguments ... https://www.python.org/dev/peps/pep-0484/#union-types	2021-04-01 11:12:30 +02:00
Andrew Kozlik	2836bfc64c	fix(core): Improve error handling and range checking in modtrezorconfig.	2021-03-26 10:54:56 +01:00
Andrew Kozlik	66823e2893	chore(core,legacy): Bump FIX_VERSIONs due to upgrade to storage version 3.	2021-03-25 14:24:41 +01:00
Andrew Kozlik	3084d1196d	feat(core): Support 50 digit PIN and wipe code.	2021-03-25 14:24:41 +01:00
Pavol Rusnak	4649b80b44	feat(core): allow secp256k1-zkp for bitcoin-only build ... (but keep it disabled)	2021-03-18 15:42:52 +01:00
Pavol Rusnak	d211e3af07	fix(core): switch define to invert display colors into const volatile ... using define causes compiler to over-optimize the code in display_init_seq leading to larger differences in the resulting binaries when the flag changes we want to keep the difference to minimum (1 byte) and using const volatile instead of define achieves that	2021-03-11 12:29:00 +01:00
Pavol Rusnak	e7966cc804	refactor(core): rework color definitions in bootloader	2021-03-10 18:33:00 +01:00
Pavol Rusnak	3294a49cec	fix(core): don't assert reset flags to allow "reboot to bootloader"	2021-03-10 18:31:51 +01:00
Pavol Rusnak	1e2bb337a9	refactor(core): drop buttons argument for ui_screen_firmware_info	2021-03-10 17:42:52 +01:00
Pavol Rusnak	814db111b2	feat(core): add define to invert display colors on ST7789V	2021-03-10 16:06:18 +01:00
Pavol Rusnak	5cff6ac964	doc(core): update comments around UDP emulator ... drop unused define	2021-03-09 16:19:03 +01:00
Andrew Kozlik	a8c500bffd	feat(core): Ensure that WebAuthn runs on port 21326 by default for both production and debug emulator.	2021-03-09 16:13:21 +01:00
Pavol Rusnak	ebfd51d818	fix(core): stay_in_bootloader should default to false, not true	2021-03-06 20:09:56 +01:00
Pavol Rusnak	efac5d56f5	fix(core): change touch i2c clock speed to 200 kHz ... fixes #1519	2021-03-06 20:02:11 +01:00
Martin Milata	7c1d72c254	style(core): fix bootloader formatting	2021-03-04 19:21:56 +01:00
Pavol Rusnak	29a3e91f09	feat(core): refactor display_init_seq from display_init	2021-03-04 17:04:35 +01:00
Pavol Rusnak	5dd3d73d00	fix(core): remove unused stuff from bootloader_ci ... plus minor ui function renames	2021-03-04 17:01:01 +01:00
Ondrej Mikle	a4ba24645b	feat(core): remove connect to host dialog in the bootloader	2021-03-04 16:34:30 +01:00
Pavol Rusnak	f3ae3615c7	fix(core): unify bootloader_ci with bootloader	2021-03-04 15:59:25 +01:00
Pavol Rusnak	b074404dcf	fix(core): small secbool refactor for bootloader_ci	2021-03-04 12:14:26 +01:00
Pavol Rusnak	2dc094bd3e	fix(core): small secbool refactors	2021-03-04 11:59:38 +01:00
Martin Milata	48627b7f0f	fix(core): bootloader_ci build ... See also f46380147f.	2021-02-15 20:55:54 +01:00
Pavol Rusnak	5395c542c1	chore(core): update changelog, bump version to 2.3.7	2021-02-13 11:16:11 +01:00
Pavol Rusnak	f46380147f	fix(core): update sync protobuf messages in bootloader	2021-02-10 10:56:52 +01:00