1
0
mirror of https://github.com/trezor/trezor-firmware.git synced 2024-11-26 09:28:13 +00:00
Commit Graph

13992 Commits

Author SHA1 Message Date
M1nd3r
d303dced7d fixup! fixup! fixup! fixup! refactor(core): abstract cache and context [no changelog] 2024-11-25 14:31:26 +01:00
M1nd3r
7f11fea37f fixup! docs(core): add and modify docs to context and cache [no changelog] 2024-11-22 11:53:19 +01:00
M1nd3r
35856917c3 fixup! fixup! fixup! refactor(core): abstract cache and context [no changelog] 2024-11-22 11:53:19 +01:00
M1nd3r
0a878b7558 fixup! fixup! refactor(core): abstract cache and context [no changelog] 2024-11-22 11:22:41 +01:00
M1nd3r
cebd147d76 fixup! refactor(core): abstract cache and context [no changelog] 2024-11-20 11:33:46 +01:00
M1nd3r
f431265736 docs(core): add and modify docs to context and cache
[no changelog]
2024-11-20 11:18:32 +01:00
M1nd3r
8c6ed70389 fixup! fixup! refactor(core): abstract cache and context [no changelog] 2024-11-20 10:39:52 +01:00
M1nd3r
efda21a2a7 fixup! chore(core): update core to reflect cache and context refactor [no changelog] 2024-11-20 10:38:33 +01:00
M1nd3r
91d477c3c4 fixup! refactor(core): abstract cache and context [no changelog] 2024-11-20 10:34:07 +01:00
M1nd3r
f180c32bb8 fixup! refactor(core): abstract cache and context [no changelog] 2024-11-20 10:30:03 +01:00
M1nd3r
76455464aa fixup! test(core): add setUpClass and tearDownClass to core unit tests [no changelog] 2024-11-19 12:32:25 +01:00
M1nd3r
efaddeba0f test(core): replace __init__ in unit tests with setUpClass and tearDownClass
[no changelog]
2024-11-19 12:08:10 +01:00
M1nd3r
87bb39ee63 test(core): add setUpClass and tearDownClass to core unit tests
[no changelog]
2024-11-19 12:07:10 +01:00
M1nd3r
5e4dea4f84 fixup! test(core): update tests to reflect cache refactor [no changelog] 2024-11-19 11:23:15 +01:00
M1nd3r
16618681a1 fixup! fixup! chore(core): update core to reflect cache and context refactor [no changelog] 2024-11-18 15:50:44 +01:00
M1nd3r
a18ae02354 fixup! chore(core): update core to reflect cache and context refactor [no changelog] 2024-11-18 15:12:39 +01:00
M1nd3r
7823b6188b fixup! refactor(core): abstract cache and context [no changelog] 2024-11-18 15:12:18 +01:00
M1nd3r
f51e6dce60 chore(core): update core to reflect cache and context refactor
[no changelog]
2024-11-18 09:35:10 +01:00
M1nd3r
8fe6fe5071 refactor(core): abstract cache and context
[no changelog]
2024-11-18 09:35:10 +01:00
M1nd3r
6a4a2c4134 style: fix article
[no changelog]
2024-11-18 09:35:01 +01:00
M1nd3r
6bc085c828 test(core): update tests to reflect cache refactor
[no changelog]
2024-11-15 21:56:44 +01:00
Martin Milata
7fc226258e style(common): fix cointool.py 2024-11-15 18:37:33 +01:00
Martin Milata
c101cdfcbe Merge branch 'release/24.11.01' 2024-11-15 18:37:16 +01:00
M1nd3r
f5100cd3e1 docs(core): update event-loop docs
[no changelog]
2024-11-15 16:29:52 +01:00
M1nd3r
780d41e27f chore(core): remove loop.chan
[no changelog]
2024-11-15 16:29:52 +01:00
M1nd3r
e434aabc77 chore(core): remove unused session_id from codec_v1
[no changelog]
2024-11-15 08:47:24 +01:00
M1nd3r
cce2335965 refactor(core): use if TYPE_CHECKING instead of direct import and fix style of ignore statement
[no changelog]
2024-11-15 08:47:24 +01:00
M1nd3r
7adae923d3 chore(core): allow encoding protobuf into memoryview
[no changelog]
2024-11-15 08:47:24 +01:00
M1nd3r
4f0f3b2d27 chore(core): adjust build scripts for THP
[no changelog]
2024-11-15 08:47:24 +01:00
M1nd3r
99aed4bb43 chore(protob): reserve wire types for thp messages
[no changelog]
2024-11-15 08:47:24 +01:00
M1nd3r
4c009539c7 docs(core): fix docs indentation and correct a few typos
[no changelog]
2024-11-15 08:47:24 +01:00
M1nd3r
ed90f6bd08 fix(core): fix TREZOR_MEMPERF flag
[no changelog]
2024-11-14 23:55:57 +01:00
tychovrahe
4d4ab93197 chore(core): remove residual DISPLAY_LEGACY_HEADER constant from boards
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
aac3559453 chore(core): move storage sectors to end of flash on U5G models
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
7998ae1463 feat(tests): adjust firmware hash calc test to expect different hashes based on model
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
e704c33d7d fix(core): flash driver - fix support for emulating STM32U5G based models
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
4b7cbfea0a chore(core): support FT6x36 touch driver without RST and ON pins
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
8569a1244c chore(core): add mock display driver for T3W1
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
fa953d7296 chore(core): switch T3W1 support to U5
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
b94db1ff48 feat(core): support 4 i2c instances on U5
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
1f572fa14b feat(core): support 32MHz HSE on stm32 u5
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
cd06b5f600 chore(core): add storage flash area size checks
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
5c101ab800 feat(core): switch DISC2 to use newer U5G variant
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
5894c34f58 feat(core): adjust flash layout on DISC2
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
4ed70cc9bc chore(core): remove useless MPU_MODE_KERNEL_SRAM
[no changelog]
2024-11-14 09:30:07 +01:00
tychovrahe
c50dd96783 fix(core): fix MPU configuration on F4 - kernel SRAM
[no changelog]
2024-11-13 21:02:21 +01:00
tychovrahe
1c7db05aef fix(core): fix USB/touch event conditional compilation
[no changelog]
2024-11-13 21:02:21 +01:00
cepetr
624e95a790 chore(core): remove empty_right_column field
[no changelog]
2024-11-13 12:15:38 +01:00
cepetr
c11dc5dcd3 refactor(core): rename xframebuffer to framebuffer
[no changelog]
2024-11-13 12:15:38 +01:00
cepetr
d4286ff584 chore(core): remove legacy drawing code (c)
[no changelog]
2024-11-13 12:15:38 +01:00