cepetr
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ba83a7e644
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feat(core): introduce interaction-less upgrade
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2023-10-27 16:15:15 +02:00 |
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tychovrahe
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d3284baf21
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feat(core): support STM32F429 discovery board
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2023-06-15 17:08:14 +02:00 |
|
tychovrahe
|
6cf92fd748
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feat(core): Introduce stack overflow detection by moving stack to the start of RAM
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2022-08-16 17:03:06 +02:00 |
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grdddj
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12da7f301d
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feat(core): allow for model R in firmware build
As model R will run on the same computational hardware as model T,
memory_R.ld is just a symbolic link to memory_T.ld.
[no changelog]
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2022-05-06 11:44:52 +02:00 |
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TychoVrahe
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7912a7d0d3
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build(core,storage): fix conditional compilation for different Trezor models
* build(core,storage) - Fix conditional compilation for different trezor models
* build(core) - Rename MODEL_* macro to TREZOR_MODEL_*, remove the original TREZOR_MODEL macro (replaced by conditional compilation for QSTR generation)
* build(core) - fixed missing TREZOR_MODEL to TREZOR_MODEL_x changes
[no changelog]
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2022-04-26 13:47:40 +02:00 |
|
Pavol Rusnak
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30a77a76bc
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chore(legacy): rename MEMORY_PROTECT flag to PRODUCTION to match core naming (#2003)
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2021-12-12 15:45:10 +01:00 |
|
Ondřej Vejpustek
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24200e7424
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fixup! fix(legacy): make RDI work on T1
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2021-06-24 17:34:24 +02:00 |
|
Ondrej Mikle
|
daa94ac941
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fix(legacy): make RDI work on T1
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2021-06-24 17:34:24 +02:00 |
|
Ondřej Vejpustek
|
cca9d4b1c4
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refactor(core): rename shutdown to shutdown_privileged
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2021-06-23 16:40:45 +02:00 |
|
Pavol Rusnak
|
50fdd183c2
|
ci: enable editorconfig checks, fix whitespace issues
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2020-11-11 14:43:50 +01:00 |
|
Ondrej Mikle
|
b01b24f090
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core: change startup firmware file from .s to .S which enables preprocessing and fixes TT boot
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2020-05-24 12:28:38 +02:00 |
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