tychovrahe
1 year ago
committed by
TychoVrahe
parent
8154e5103f
commit
d3284baf21
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Added support for STM32F429I-DISC1 board
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Added support for STM32F429I-DISC1 board
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Added support for STM32F429I-DISC1 board
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memory_T.ld
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#ifndef MODELS_MODEL_T2T1_H_
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#define MODELS_MODEL_T2T1_H_
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#define MODEL_NAME "T"
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#define MODEL_INTERNAL_NAME "D001"
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#define MODEL_INTERNAL_NAME_TOKEN T
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#define MODEL_NAME_QSTR MP_QSTR_T
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#define MODEL_INTERNAL_NAME_QSTR MP_QSTR_D001
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/*** Discovery uses DEV keys in any build variant ***/
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#define MODEL_BOARDLOADER_KEYS \
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(const uint8_t *)"\xdb\x99\x5f\xe2\x51\x69\xd1\x41\xca\xb9\xbb\xba\x92\xba\xa0\x1f\x9f\x2e\x1e\xce\x7d\xf4\xcb\x2a\xc0\x51\x90\xf3\x7f\xcc\x1f\x9d", \
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(const uint8_t *)"\x21\x52\xf8\xd1\x9b\x79\x1d\x24\x45\x32\x42\xe1\x5f\x2e\xab\x6c\xb7\xcf\xfa\x7b\x6a\x5e\xd3\x00\x97\x96\x0e\x06\x98\x81\xdb\x12", \
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(const uint8_t *)"\x22\xfc\x29\x77\x92\xf0\xb6\xff\xc0\xbf\xcf\xdb\x7e\xdb\x0c\x0a\xa1\x4e\x02\x5a\x36\x5e\xc0\xe3\x42\xe8\x6e\x38\x29\xcb\x74\xb6",
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#define MODEL_BOOTLOADER_KEYS \
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(const uint8_t *)"\xd7\x59\x79\x3b\xbc\x13\xa2\x81\x9a\x82\x7c\x76\xad\xb6\xfb\xa8\xa4\x9a\xee\x00\x7f\x49\xf2\xd0\x99\x2d\x99\xb8\x25\xad\x2c\x48", \
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(const uint8_t *)"\x63\x55\x69\x1c\x17\x8a\x8f\xf9\x10\x07\xa7\x47\x8a\xfb\x95\x5e\xf7\x35\x2c\x63\xe7\xb2\x57\x03\x98\x4c\xf7\x8b\x26\xe2\x1a\x56", \
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(const uint8_t *)"\xee\x93\xa4\xf6\x6f\x8d\x16\xb8\x19\xbb\x9b\xeb\x9f\xfc\xcd\xfc\xdc\x14\x12\xe8\x7f\xee\x6a\x32\x4c\x2a\x99\xa1\xe0\xe6\x71\x48",
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#endif
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#ifndef _STM32F429I_DISC1_H
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#define _STM32F429I_DISC1_H
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#define USE_I2C 1
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#define USE_TOUCH 1
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#define USE_SDRAM 1
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#define USE_RGB_COLORS 1
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#include "displays/ltdc.h"
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#define I2C_INSTANCE I2C3
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#define I2C_INSTANCE_CLK_EN __HAL_RCC_I2C3_CLK_ENABLE
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#define I2C_INSTANCE_CLK_DIS __HAL_RCC_I2C3_CLK_DISABLE
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#define I2C_INSTANCE_PIN_AF GPIO_AF4_I2C3
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#define I2C_INSTANCE_SDA_PORT GPIOC
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#define I2C_INSTANCE_SDA_PIN GPIO_PIN_9
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#define I2C_INSTANCE_SDA_CLK_EN __HAL_RCC_GPIOC_CLK_ENABLE
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#define I2C_INSTANCE_SCL_PORT GPIOA
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#define I2C_INSTANCE_SCL_PIN GPIO_PIN_8
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#define I2C_INSTANCE_SCL_CLK_EN __HAL_RCC_GPIOA_CLK_ENABLE
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#define I2C_INSTANCE_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
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#define I2C_INSTANCE_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
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#endif //_STM32F429I_DISC1_H
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#include <stdint.h>
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#include TREZOR_BOARD
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#include "ili9341_spi.h"
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#include STM32_HAL_H
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/**
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* @brief ILI9341 chip IDs
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*/
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#define ILI9341_ID 0x9341
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/**
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* @brief ILI9341 Size
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*/
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#define ILI9341_LCD_PIXEL_WIDTH ((uint16_t)240)
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#define ILI9341_LCD_PIXEL_HEIGHT ((uint16_t)320)
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/**
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* @brief ILI9341 Timing
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*/
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/* Timing configuration (Typical configuration from ILI9341 datasheet)
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HSYNC=10 (9+1)
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HBP=20 (29-10+1)
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ActiveW=240 (269-20-10+1)
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HFP=10 (279-240-20-10+1)
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VSYNC=2 (1+1)
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VBP=2 (3-2+1)
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ActiveH=320 (323-2-2+1)
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VFP=4 (327-320-2-2+1)
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*/
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/**
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* @brief ILI9341 Registers
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*/
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/* Level 1 Commands */
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#define LCD_SWRESET 0x01 /* Software Reset */
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#define LCD_READ_DISPLAY_ID 0x04 /* Read display identification information */
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#define LCD_RDDST 0x09 /* Read Display Status */
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#define LCD_RDDPM 0x0A /* Read Display Power Mode */
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#define LCD_RDDMADCTL 0x0B /* Read Display MADCTL */
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#define LCD_RDDCOLMOD 0x0C /* Read Display Pixel Format */
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#define LCD_RDDIM 0x0D /* Read Display Image Format */
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#define LCD_RDDSM 0x0E /* Read Display Signal Mode */
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#define LCD_RDDSDR 0x0F /* Read Display Self-Diagnostic Result */
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#define LCD_SPLIN 0x10 /* Enter Sleep Mode */
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#define LCD_SLEEP_OUT 0x11 /* Sleep out register */
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#define LCD_PTLON 0x12 /* Partial Mode ON */
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#define LCD_NORMAL_MODE_ON 0x13 /* Normal Display Mode ON */
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#define LCD_DINVOFF 0x20 /* Display Inversion OFF */
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#define LCD_DINVON 0x21 /* Display Inversion ON */
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#define LCD_GAMMA 0x26 /* Gamma register */
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#define LCD_DISPLAY_OFF 0x28 /* Display off register */
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#define LCD_DISPLAY_ON 0x29 /* Display on register */
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#define LCD_COLUMN_ADDR 0x2A /* Colomn address register */
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#define LCD_PAGE_ADDR 0x2B /* Page address register */
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#define LCD_GRAM 0x2C /* GRAM register */
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#define LCD_RGBSET 0x2D /* Color SET */
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#define LCD_RAMRD 0x2E /* Memory Read */
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#define LCD_PLTAR 0x30 /* Partial Area */
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#define LCD_VSCRDEF 0x33 /* Vertical Scrolling Definition */
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#define LCD_TEOFF 0x34 /* Tearing Effect Line OFF */
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#define LCD_TEON 0x35 /* Tearing Effect Line ON */
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#define LCD_MAC 0x36 /* Memory Access Control register*/
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#define LCD_VSCRSADD 0x37 /* Vertical Scrolling Start Address */
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#define LCD_IDMOFF 0x38 /* Idle Mode OFF */
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#define LCD_IDMON 0x39 /* Idle Mode ON */
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#define LCD_PIXEL_FORMAT 0x3A /* Pixel Format register */
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#define LCD_WRITE_MEM_CONTINUE 0x3C /* Write Memory Continue */
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#define LCD_READ_MEM_CONTINUE 0x3E /* Read Memory Continue */
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#define LCD_SET_TEAR_SCANLINE 0x44 /* Set Tear Scanline */
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#define LCD_GET_SCANLINE 0x45 /* Get Scanline */
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#define LCD_WDB 0x51 /* Write Brightness Display register */
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#define LCD_RDDISBV 0x52 /* Read Display Brightness */
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#define LCD_WCD 0x53 /* Write Control Display register*/
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#define LCD_RDCTRLD 0x54 /* Read CTRL Display */
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#define LCD_WRCABC 0x55 /* Write Content Adaptive Brightness Control */
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#define LCD_RDCABC 0x56 /* Read Content Adaptive Brightness Control */
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#define LCD_WRITE_CABC 0x5E /* Write CABC Minimum Brightness */
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#define LCD_READ_CABC 0x5F /* Read CABC Minimum Brightness */
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#define LCD_READ_ID1 0xDA /* Read ID1 */
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#define LCD_READ_ID2 0xDB /* Read ID2 */
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#define LCD_READ_ID3 0xDC /* Read ID3 */
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/* Level 2 Commands */
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#define LCD_RGB_INTERFACE 0xB0 /* RGB Interface Signal Control */
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#define LCD_FRMCTR1 0xB1 /* Frame Rate Control (In Normal Mode) */
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#define LCD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle Mode) */
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#define LCD_FRMCTR3 0xB3 /* Frame Rate Control (In Partial Mode) */
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#define LCD_INVTR 0xB4 /* Display Inversion Control */
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#define LCD_BPC 0xB5 /* Blanking Porch Control register */
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#define LCD_DFC 0xB6 /* Display Function Control register */
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#define LCD_ETMOD 0xB7 /* Entry Mode Set */
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#define LCD_BACKLIGHT1 0xB8 /* Backlight Control 1 */
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#define LCD_BACKLIGHT2 0xB9 /* Backlight Control 2 */
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#define LCD_BACKLIGHT3 0xBA /* Backlight Control 3 */
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#define LCD_BACKLIGHT4 0xBB /* Backlight Control 4 */
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#define LCD_BACKLIGHT5 0xBC /* Backlight Control 5 */
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#define LCD_BACKLIGHT7 0xBE /* Backlight Control 7 */
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#define LCD_BACKLIGHT8 0xBF /* Backlight Control 8 */
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#define LCD_POWER1 0xC0 /* Power Control 1 register */
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#define LCD_POWER2 0xC1 /* Power Control 2 register */
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#define LCD_VCOM1 0xC5 /* VCOM Control 1 register */
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#define LCD_VCOM2 0xC7 /* VCOM Control 2 register */
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#define LCD_NVMWR 0xD0 /* NV Memory Write */
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#define LCD_NVMPKEY 0xD1 /* NV Memory Protection Key */
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#define LCD_RDNVM 0xD2 /* NV Memory Status Read */
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#define LCD_READ_ID4 0xD3 /* Read ID4 */
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#define LCD_PGAMMA 0xE0 /* Positive Gamma Correction register */
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#define LCD_NGAMMA 0xE1 /* Negative Gamma Correction register */
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#define LCD_DGAMCTRL1 0xE2 /* Digital Gamma Control 1 */
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#define LCD_DGAMCTRL2 0xE3 /* Digital Gamma Control 2 */
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#define LCD_INTERFACE 0xF6 /* Interface control register */
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/* Extend register commands */
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#define LCD_POWERA 0xCB /* Power control A register */
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#define LCD_POWERB 0xCF /* Power control B register */
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#define LCD_DTCA 0xE8 /* Driver timing control A */
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#define LCD_DTCB 0xEA /* Driver timing control B */
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#define LCD_POWER_SEQ 0xED /* Power on sequence register */
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#define LCD_3GAMMA_EN 0xF2 /* 3 Gamma enable register */
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#define LCD_PRC 0xF7 /* Pump ratio control register */
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/* Size of read registers */
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#define LCD_READ_ID4_SIZE 3 /* Size of Read ID4 */
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/*############################### SPIx #######################################*/
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#define DISCOVERY_SPIx SPI5
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#define DISCOVERY_SPIx_CLK_ENABLE() __HAL_RCC_SPI5_CLK_ENABLE()
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#define DISCOVERY_SPIx_GPIO_PORT GPIOF /* GPIOF */
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#define DISCOVERY_SPIx_AF GPIO_AF5_SPI5
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#define DISCOVERY_SPIx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
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#define DISCOVERY_SPIx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOF_CLK_DISABLE()
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#define DISCOVERY_SPIx_SCK_PIN GPIO_PIN_7 /* PF.07 */
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#define DISCOVERY_SPIx_MISO_PIN GPIO_PIN_8 /* PF.08 */
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#define DISCOVERY_SPIx_MOSI_PIN GPIO_PIN_9 /* PF.09 */
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/* Maximum Timeout values for flags waiting loops. These timeouts are not based
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on accurate values, they just guarantee that the application will not remain
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stuck if the SPI communication is corrupted.
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You may modify these timeout values depending on CPU frequency and
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application conditions (interrupts routines ...). */
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#define SPIx_TIMEOUT_MAX ((uint32_t)0x1000)
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/*################################ LCD #######################################*/
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/* Chip Select macro definition */
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#define LCD_CS_LOW() \
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HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_RESET)
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#define LCD_CS_HIGH() \
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HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_SET)
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/* Set WRX High to send data */
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#define LCD_WRX_LOW() \
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HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_RESET)
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#define LCD_WRX_HIGH() \
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HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_SET)
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/* Set WRX High to send data */
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#define LCD_RDX_LOW() \
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HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_RESET)
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#define LCD_RDX_HIGH() \
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HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_SET)
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/**
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* @brief LCD Control pin
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*/
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#define LCD_NCS_PIN GPIO_PIN_2
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#define LCD_NCS_GPIO_PORT GPIOC
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#define LCD_NCS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
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#define LCD_NCS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
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/**
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* @}
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*/
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/**
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* @brief LCD Command/data pin
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*/
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#define LCD_WRX_PIN GPIO_PIN_13
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#define LCD_WRX_GPIO_PORT GPIOD
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#define LCD_WRX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
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#define LCD_WRX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
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#define LCD_RDX_PIN GPIO_PIN_12
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#define LCD_RDX_GPIO_PORT GPIOD
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#define LCD_RDX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
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#define LCD_RDX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
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static SPI_HandleTypeDef SpiHandle;
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uint32_t SpixTimeout =
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SPIx_TIMEOUT_MAX; /*<! Value of Timeout when SPI communication fails */
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/* SPIx bus function */
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static void SPIx_Init(void);
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static void ili9341_Write(uint16_t Value);
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static uint32_t ili9341_Read(uint8_t ReadSize);
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static void ili9341_Error(void);
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/**
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* @brief SPIx Bus initialization
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*/
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static void SPIx_Init(void) {
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if (HAL_SPI_GetState(&SpiHandle) == HAL_SPI_STATE_RESET) {
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/* SPI configuration -----------------------------------------------------*/
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SpiHandle.Instance = DISCOVERY_SPIx;
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/* SPI baudrate is set to 5.6 MHz (PCLK2/SPI_BaudRatePrescaler = 90/16
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= 5.625 MHz) to verify these constraints:
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- ILI9341 LCD SPI interface max baudrate is 10MHz for write and 6.66MHz
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for read
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- l3gd20 SPI interface max baudrate is 10MHz for write/read
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- PCLK2 frequency is set to 90 MHz
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*/
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SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
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/* On STM32F429I-Discovery, LCD ID cannot be read then keep a common
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* configuration */
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/* for LCD and GYRO (SPI_DIRECTION_2LINES) */
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/* Note: To read a register a LCD, SPI_DIRECTION_1LINE should be set */
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SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
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SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE;
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SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW;
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SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
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SpiHandle.Init.CRCPolynomial = 7;
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SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT;
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SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
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SpiHandle.Init.NSS = SPI_NSS_SOFT;
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SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
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SpiHandle.Init.Mode = SPI_MODE_MASTER;
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HAL_SPI_Init(&SpiHandle);
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}
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}
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/**
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* @brief SPIx error treatment function.
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*/
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static void ili9341_Error(void) {
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/* De-initialize the SPI communication BUS */
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HAL_SPI_DeInit(&SpiHandle);
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/* Re- Initialize the SPI communication BUS */
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SPIx_Init();
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}
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/**
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* @brief Reads 4 bytes from device.
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* @param ReadSize: Number of bytes to read (max 4 bytes)
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* @retval Value read on the SPI
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*/
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static uint32_t ili9341_Read(uint8_t ReadSize) {
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HAL_StatusTypeDef status = HAL_OK;
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uint32_t readvalue;
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status =
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HAL_SPI_Receive(&SpiHandle, (uint8_t*)&readvalue, ReadSize, SpixTimeout);
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/* Check the communication status */
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if (status != HAL_OK) {
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/* Re-Initialize the BUS */
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ili9341_Error();
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}
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return readvalue;
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}
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/**
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* @brief Writes a byte to device.
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* @param Value: value to be written
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*/
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static void ili9341_Write(uint16_t Value) {
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HAL_StatusTypeDef status = HAL_OK;
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status = HAL_SPI_Transmit(&SpiHandle, (uint8_t*)&Value, 1, SpixTimeout);
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/* Check the communication status */
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if (status != HAL_OK) {
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/* Re-Initialize the BUS */
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ili9341_Error();
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}
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}
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void ili9341_spi_init(void) {
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GPIO_InitTypeDef GPIO_InitStructure;
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/* Configure NCS in Output Push-Pull mode */
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LCD_WRX_GPIO_CLK_ENABLE();
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GPIO_InitStructure.Pin = LCD_WRX_PIN;
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
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HAL_GPIO_Init(LCD_WRX_GPIO_PORT, &GPIO_InitStructure);
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LCD_RDX_GPIO_CLK_ENABLE();
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GPIO_InitStructure.Pin = LCD_RDX_PIN;
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
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HAL_GPIO_Init(LCD_RDX_GPIO_PORT, &GPIO_InitStructure);
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/* Configure the LCD Control pins ----------------------------------------*/
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LCD_NCS_GPIO_CLK_ENABLE();
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/* Configure NCS in Output Push-Pull mode */
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GPIO_InitStructure.Pin = LCD_NCS_PIN;
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
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HAL_GPIO_Init(LCD_NCS_GPIO_PORT, &GPIO_InitStructure);
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/* Set or Reset the control line */
|
||||
LCD_CS_LOW();
|
||||
LCD_CS_HIGH();
|
||||
|
||||
/* Enable SPIx clock */
|
||||
DISCOVERY_SPIx_CLK_ENABLE();
|
||||
|
||||
/* Enable DISCOVERY_SPI GPIO clock */
|
||||
DISCOVERY_SPIx_GPIO_CLK_ENABLE();
|
||||
|
||||
/* configure SPI SCK, MOSI and MISO */
|
||||
GPIO_InitStructure.Pin = (DISCOVERY_SPIx_SCK_PIN | DISCOVERY_SPIx_MOSI_PIN |
|
||||
DISCOVERY_SPIx_MISO_PIN);
|
||||
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStructure.Pull = GPIO_PULLDOWN;
|
||||
GPIO_InitStructure.Speed = GPIO_SPEED_MEDIUM;
|
||||
GPIO_InitStructure.Alternate = DISCOVERY_SPIx_AF;
|
||||
HAL_GPIO_Init(DISCOVERY_SPIx_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
SPIx_Init();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes register value.
|
||||
*/
|
||||
void ili9341_WriteData(uint16_t RegValue) {
|
||||
/* Set WRX to send data */
|
||||
LCD_WRX_HIGH();
|
||||
|
||||
/* Reset LCD control line(/CS) and Send data */
|
||||
LCD_CS_LOW();
|
||||
ili9341_Write(RegValue);
|
||||
|
||||
/* Deselect: Chip Select high */
|
||||
LCD_CS_HIGH();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes register address.
|
||||
*/
|
||||
void ili9341_WriteReg(uint8_t Reg) {
|
||||
/* Reset WRX to send command */
|
||||
LCD_WRX_LOW();
|
||||
|
||||
/* Reset LCD control line(/CS) and Send command */
|
||||
LCD_CS_LOW();
|
||||
ili9341_Write(Reg);
|
||||
|
||||
/* Deselect: Chip Select high */
|
||||
LCD_CS_HIGH();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads register value.
|
||||
* @param RegValue Address of the register to read
|
||||
* @param ReadSize Number of bytes to read
|
||||
* @retval Content of the register value
|
||||
*/
|
||||
uint32_t ili9341_ReadData(uint16_t RegValue, uint8_t ReadSize) {
|
||||
uint32_t readvalue = 0;
|
||||
|
||||
/* Select: Chip Select low */
|
||||
LCD_CS_LOW();
|
||||
|
||||
/* Reset WRX to send command */
|
||||
LCD_WRX_LOW();
|
||||
|
||||
ili9341_Write(RegValue);
|
||||
|
||||
readvalue = ili9341_Read(ReadSize);
|
||||
|
||||
/* Set WRX to send data */
|
||||
LCD_WRX_HIGH();
|
||||
|
||||
/* Deselect: Chip Select high */
|
||||
LCD_CS_HIGH();
|
||||
|
||||
return readvalue;
|
||||
}
|
||||
|
||||
void ili9341_init(void) {
|
||||
/* Initialize ILI9341 low level bus layer ----------------------------------*/
|
||||
ili9341_spi_init();
|
||||
|
||||
ili9341_WriteReg(LCD_DISPLAY_OFF);
|
||||
|
||||
/* Configure LCD */
|
||||
ili9341_WriteReg(0xCA);
|
||||
ili9341_WriteData(0xC3);
|
||||
ili9341_WriteData(0x08);
|
||||
ili9341_WriteData(0x50);
|
||||
ili9341_WriteReg(LCD_POWERB);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0xC1);
|
||||
ili9341_WriteData(0x30);
|
||||
ili9341_WriteReg(LCD_POWER_SEQ);
|
||||
ili9341_WriteData(0x64);
|
||||
ili9341_WriteData(0x03);
|
||||
ili9341_WriteData(0x12);
|
||||
ili9341_WriteData(0x81);
|
||||
ili9341_WriteReg(LCD_DTCA);
|
||||
ili9341_WriteData(0x85);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x78);
|
||||
ili9341_WriteReg(LCD_POWERA);
|
||||
ili9341_WriteData(0x39);
|
||||
ili9341_WriteData(0x2C);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x34);
|
||||
ili9341_WriteData(0x02);
|
||||
ili9341_WriteReg(LCD_PRC);
|
||||
ili9341_WriteData(0x20);
|
||||
ili9341_WriteReg(LCD_DTCB);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteReg(LCD_FRMCTR1);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x1B);
|
||||
ili9341_WriteReg(LCD_DFC);
|
||||
ili9341_WriteData(0x0A);
|
||||
ili9341_WriteData(0xA2);
|
||||
ili9341_WriteReg(LCD_POWER1);
|
||||
ili9341_WriteData(0x10);
|
||||
ili9341_WriteReg(LCD_POWER2);
|
||||
ili9341_WriteData(0x10);
|
||||
ili9341_WriteReg(LCD_VCOM1);
|
||||
ili9341_WriteData(0x45);
|
||||
ili9341_WriteData(0x15);
|
||||
ili9341_WriteReg(LCD_VCOM2);
|
||||
ili9341_WriteData(0x90);
|
||||
ili9341_WriteReg(LCD_MAC);
|
||||
ili9341_WriteData(0xC8);
|
||||
ili9341_WriteReg(LCD_3GAMMA_EN);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteReg(LCD_RGB_INTERFACE);
|
||||
ili9341_WriteData(0xC2);
|
||||
ili9341_WriteReg(LCD_DFC);
|
||||
ili9341_WriteData(0x0A);
|
||||
ili9341_WriteData(0xA7);
|
||||
ili9341_WriteData(0x27);
|
||||
ili9341_WriteData(0x04);
|
||||
|
||||
/* Colomn address set */
|
||||
ili9341_WriteReg(LCD_COLUMN_ADDR);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0xEF);
|
||||
/* Page address set */
|
||||
ili9341_WriteReg(LCD_PAGE_ADDR);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x01);
|
||||
ili9341_WriteData(0x3F);
|
||||
ili9341_WriteReg(LCD_INTERFACE);
|
||||
ili9341_WriteData(0x01);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x06);
|
||||
|
||||
ili9341_WriteReg(LCD_GRAM);
|
||||
HAL_Delay(200);
|
||||
|
||||
ili9341_WriteReg(LCD_GAMMA);
|
||||
ili9341_WriteData(0x01);
|
||||
|
||||
ili9341_WriteReg(LCD_PGAMMA);
|
||||
ili9341_WriteData(0x0F);
|
||||
ili9341_WriteData(0x29);
|
||||
ili9341_WriteData(0x24);
|
||||
ili9341_WriteData(0x0C);
|
||||
ili9341_WriteData(0x0E);
|
||||
ili9341_WriteData(0x09);
|
||||
ili9341_WriteData(0x4E);
|
||||
ili9341_WriteData(0x78);
|
||||
ili9341_WriteData(0x3C);
|
||||
ili9341_WriteData(0x09);
|
||||
ili9341_WriteData(0x13);
|
||||
ili9341_WriteData(0x05);
|
||||
ili9341_WriteData(0x17);
|
||||
ili9341_WriteData(0x11);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteReg(LCD_NGAMMA);
|
||||
ili9341_WriteData(0x00);
|
||||
ili9341_WriteData(0x16);
|
||||
ili9341_WriteData(0x1B);
|
||||
ili9341_WriteData(0x04);
|
||||
ili9341_WriteData(0x11);
|
||||
ili9341_WriteData(0x07);
|
||||
ili9341_WriteData(0x31);
|
||||
ili9341_WriteData(0x33);
|
||||
ili9341_WriteData(0x42);
|
||||
ili9341_WriteData(0x05);
|
||||
ili9341_WriteData(0x0C);
|
||||
ili9341_WriteData(0x0A);
|
||||
ili9341_WriteData(0x28);
|
||||
ili9341_WriteData(0x2F);
|
||||
ili9341_WriteData(0x0F);
|
||||
|
||||
ili9341_WriteReg(LCD_SLEEP_OUT);
|
||||
HAL_Delay(200);
|
||||
ili9341_WriteReg(LCD_DISPLAY_ON);
|
||||
/* GRAM start writing */
|
||||
ili9341_WriteReg(LCD_GRAM);
|
||||
}
|
||||
@ -0,0 +1,13 @@
|
||||
#ifndef _ILI9341_SPI_H
|
||||
#define _ILI9341_SPI_H
|
||||
|
||||
#define ILI9341_HSYNC ((uint32_t)9) /* Horizontal synchronization */
|
||||
#define ILI9341_HBP ((uint32_t)29) /* Horizontal back porch */
|
||||
#define ILI9341_HFP ((uint32_t)2) /* Horizontal front porch */
|
||||
#define ILI9341_VSYNC ((uint32_t)1) /* Vertical synchronization */
|
||||
#define ILI9341_VBP ((uint32_t)3) /* Vertical back porch */
|
||||
#define ILI9341_VFP ((uint32_t)2) /* Vertical front porch */
|
||||
|
||||
void ili9341_init(void);
|
||||
|
||||
#endif //_ILI9341_SPI_H
|
||||
@ -0,0 +1,373 @@
|
||||
/*
|
||||
* This file is part of the Trezor project, https://trezor.io/
|
||||
*
|
||||
* Copyright (c) SatoshiLabs
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include TREZOR_BOARD
|
||||
#include "display_interface.h"
|
||||
#include "memzero.h"
|
||||
#include STM32_HAL_H
|
||||
|
||||
#include "ili9341_spi.h"
|
||||
#include "sdram.h"
|
||||
|
||||
#define MAX_LAYER_NUMBER 2
|
||||
#define LCD_FRAME_BUFFER ((uint32_t)SDRAM_DEVICE_ADDR)
|
||||
|
||||
LTDC_HandleTypeDef LtdcHandler;
|
||||
static RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||
|
||||
/* Default LCD configuration with LCD Layer 1 */
|
||||
uint32_t ActiveLayer = 0;
|
||||
// static LCD_DrawPropTypeDef DrawProp[MAX_LAYER_NUMBER];
|
||||
// LCD_DrvTypeDef *LcdDrv;
|
||||
|
||||
static int DISPLAY_BACKLIGHT = -1;
|
||||
static int DISPLAY_ORIENTATION = -1;
|
||||
|
||||
// this is just for compatibility with DMA2D using algorithms
|
||||
uint8_t *const DISPLAY_DATA_ADDRESS = 0;
|
||||
|
||||
uint16_t display_index_x = 0;
|
||||
uint16_t display_index_y = 0;
|
||||
uint16_t display_window_x0 = 0;
|
||||
uint16_t display_window_y0 = MAX_DISPLAY_RESX - 1;
|
||||
uint16_t display_window_x1 = 0;
|
||||
uint16_t display_window_y1 = MAX_DISPLAY_RESY - 1;
|
||||
|
||||
void display_pixeldata(uint16_t c) {
|
||||
((uint16_t *)LCD_FRAME_BUFFER)[(display_index_y * MAX_DISPLAY_RESX) +
|
||||
display_index_x] = c;
|
||||
|
||||
display_index_x++;
|
||||
|
||||
if (display_index_x > display_window_x1) {
|
||||
display_index_x = display_window_x0;
|
||||
display_index_y++;
|
||||
|
||||
if (display_index_y > display_window_y1) {
|
||||
display_index_y = display_window_y0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void display_reset_state() {}
|
||||
|
||||
static void __attribute__((unused)) display_sleep(void) {}
|
||||
|
||||
static void display_unsleep(void) {}
|
||||
|
||||
/**
|
||||
* @brief Initializes the LCD layers.
|
||||
* @param LayerIndex: the layer foreground or background.
|
||||
* @param FB_Address: the layer frame buffer.
|
||||
*/
|
||||
void BSP_LCD_LayerDefaultInit(uint16_t LayerIndex, uint32_t FB_Address) {
|
||||
LTDC_LayerCfgTypeDef Layercfg;
|
||||
|
||||
/* Layer Init */
|
||||
Layercfg.WindowX0 = 0;
|
||||
Layercfg.WindowX1 = MAX_DISPLAY_RESX;
|
||||
Layercfg.WindowY0 = 0;
|
||||
Layercfg.WindowY1 = MAX_DISPLAY_RESY;
|
||||
Layercfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
|
||||
Layercfg.FBStartAdress = FB_Address;
|
||||
Layercfg.Alpha = 255;
|
||||
Layercfg.Alpha0 = 0;
|
||||
Layercfg.Backcolor.Blue = 0;
|
||||
Layercfg.Backcolor.Green = 0;
|
||||
Layercfg.Backcolor.Red = 0;
|
||||
Layercfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
|
||||
Layercfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
|
||||
Layercfg.ImageWidth = MAX_DISPLAY_RESX;
|
||||
Layercfg.ImageHeight = MAX_DISPLAY_RESY;
|
||||
|
||||
HAL_LTDC_ConfigLayer(&LtdcHandler, &Layercfg, LayerIndex);
|
||||
|
||||
// DrawProp[LayerIndex].BackColor = LCD_COLOR_WHITE;
|
||||
// DrawProp[LayerIndex].pFont = &Font24;
|
||||
// DrawProp[LayerIndex].TextColor = LCD_COLOR_BLACK;
|
||||
|
||||
/* Dithering activation */
|
||||
HAL_LTDC_EnableDither(&LtdcHandler);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the LCD Layer.
|
||||
* @param LayerIndex: the Layer foreground or background.
|
||||
*/
|
||||
void BSP_LCD_SelectLayer(uint32_t LayerIndex) { ActiveLayer = LayerIndex; }
|
||||
|
||||
/**
|
||||
* @brief Sets a LCD Layer visible.
|
||||
* @param LayerIndex: the visible Layer.
|
||||
* @param state: new state of the specified layer.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
*/
|
||||
void BSP_LCD_SetLayerVisible(uint32_t LayerIndex, FunctionalState state) {
|
||||
if (state == ENABLE) {
|
||||
__HAL_LTDC_LAYER_ENABLE(&LtdcHandler, LayerIndex);
|
||||
} else {
|
||||
__HAL_LTDC_LAYER_DISABLE(&LtdcHandler, LayerIndex);
|
||||
}
|
||||
__HAL_LTDC_RELOAD_CONFIG(&LtdcHandler);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets an LCD Layer visible without reloading.
|
||||
* @param LayerIndex: Visible Layer
|
||||
* @param State: New state of the specified layer
|
||||
* This parameter can be one of the following values:
|
||||
* @arg ENABLE
|
||||
* @arg DISABLE
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_LCD_SetLayerVisible_NoReload(uint32_t LayerIndex,
|
||||
FunctionalState State) {
|
||||
if (State == ENABLE) {
|
||||
__HAL_LTDC_LAYER_ENABLE(&LtdcHandler, LayerIndex);
|
||||
} else {
|
||||
__HAL_LTDC_LAYER_DISABLE(&LtdcHandler, LayerIndex);
|
||||
}
|
||||
/* Do not Sets the Reload */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the Transparency.
|
||||
* @param LayerIndex: the Layer foreground or background.
|
||||
* @param Transparency: the Transparency,
|
||||
* This parameter must range from 0x00 to 0xFF.
|
||||
*/
|
||||
void BSP_LCD_SetTransparency(uint32_t LayerIndex, uint8_t Transparency) {
|
||||
HAL_LTDC_SetAlpha(&LtdcHandler, Transparency, LayerIndex);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the transparency without reloading.
|
||||
* @param LayerIndex: Layer foreground or background.
|
||||
* @param Transparency: Transparency
|
||||
* This parameter must be a number between Min_Data = 0x00 and
|
||||
* Max_Data = 0xFF
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_LCD_SetTransparency_NoReload(uint32_t LayerIndex,
|
||||
uint8_t Transparency) {
|
||||
HAL_LTDC_SetAlpha_NoReload(&LtdcHandler, Transparency, LayerIndex);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets a LCD layer frame buffer address.
|
||||
* @param LayerIndex: specifies the Layer foreground or background
|
||||
* @param Address: new LCD frame buffer value
|
||||
*/
|
||||
void BSP_LCD_SetLayerAddress(uint32_t LayerIndex, uint32_t Address) {
|
||||
HAL_LTDC_SetAddress(&LtdcHandler, Address, LayerIndex);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets an LCD layer frame buffer address without reloading.
|
||||
* @param LayerIndex: Layer foreground or background
|
||||
* @param Address: New LCD frame buffer value
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_LCD_SetLayerAddress_NoReload(uint32_t LayerIndex, uint32_t Address) {
|
||||
HAL_LTDC_SetAddress_NoReload(&LtdcHandler, Address, LayerIndex);
|
||||
}
|
||||
|
||||
// static struct { uint16_t x, y; } BUFFER_OFFSET;
|
||||
|
||||
void display_set_window(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1) {
|
||||
display_window_x0 = x0;
|
||||
display_window_x1 = x1;
|
||||
display_window_y0 = y0;
|
||||
display_window_y1 = y1;
|
||||
display_index_x = x0;
|
||||
display_index_y = y0;
|
||||
|
||||
// /* Reconfigure the layer size */
|
||||
// HAL_LTDC_SetWindowSize_NoReload(&LtdcHandler, x1-x0 + 1, y1-y0 + 1, 0);
|
||||
//
|
||||
// /* Reconfigure the layer position */
|
||||
// HAL_LTDC_SetWindowPosition_NoReload(&LtdcHandler, x0, y0, 0);
|
||||
}
|
||||
|
||||
int display_orientation(int degrees) { return 0; }
|
||||
|
||||
int display_get_orientation(void) { return DISPLAY_ORIENTATION; }
|
||||
|
||||
int display_backlight(int val) {
|
||||
if (DISPLAY_BACKLIGHT != val && val >= 0 && val <= 255) {
|
||||
DISPLAY_BACKLIGHT = val;
|
||||
// TIM1->CCR1 = LED_PWM_TIM_PERIOD * val / 255;
|
||||
}
|
||||
return DISPLAY_BACKLIGHT;
|
||||
}
|
||||
|
||||
void display_init_seq(void) { display_unsleep(); }
|
||||
|
||||
void display_init(void) {
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/* Enable the LTDC and DMA2D Clock */
|
||||
__HAL_RCC_LTDC_CLK_ENABLE();
|
||||
__HAL_RCC_DMA2D_CLK_ENABLE();
|
||||
|
||||
/* Enable GPIOs clock */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
|
||||
/* GPIOs Configuration */
|
||||
/*
|
||||
+------------------------+-----------------------+----------------------------+
|
||||
+ LCD pins assignment +
|
||||
+------------------------+-----------------------+----------------------------+
|
||||
| LCD_TFT R2 <-> PC.10 | LCD_TFT G2 <-> PA.06 | LCD_TFT B2 <-> PD.06 | |
|
||||
LCD_TFT R3 <-> PB.00 | LCD_TFT G3 <-> PG.10 | LCD_TFT B3 <-> PG.11 |
|
||||
| LCD_TFT R4 <-> PA.11 | LCD_TFT G4 <-> PB.10 | LCD_TFT B4 <-> PG.12 | |
|
||||
LCD_TFT R5 <-> PA.12 | LCD_TFT G5 <-> PB.11 | LCD_TFT B5 <-> PA.03 |
|
||||
| LCD_TFT R6 <-> PB.01 | LCD_TFT G6 <-> PC.07 | LCD_TFT B6 <-> PB.08 | |
|
||||
LCD_TFT R7 <-> PG.06 | LCD_TFT G7 <-> PD.03 | LCD_TFT B7 <-> PB.09 |
|
||||
-------------------------------------------------------------------------------
|
||||
| LCD_TFT HSYNC <-> PC.06 | LCDTFT VSYNC <-> PA.04 |
|
||||
| LCD_TFT CLK <-> PG.07 | LCD_TFT DE <-> PF.10 |
|
||||
-----------------------------------------------------
|
||||
*/
|
||||
|
||||
/* GPIOA configuration */
|
||||
GPIO_InitStructure.Pin =
|
||||
GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_6 | GPIO_PIN_11 | GPIO_PIN_12;
|
||||
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStructure.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
|
||||
GPIO_InitStructure.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOB configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOC configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_10;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOD configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_3 | GPIO_PIN_6;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOF configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_10;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOG configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_11;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOB configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
|
||||
GPIO_InitStructure.Alternate = GPIO_AF9_LTDC;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOG configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_10 | GPIO_PIN_12;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
|
||||
|
||||
/* On STM32F429I-DISCO, it is not possible to read ILI9341 ID because */
|
||||
/* PIN EXTC is not connected to VDD and then LCD_READ_ID4 is not accessible.
|
||||
*/
|
||||
/* In this case, ReadID function is bypassed.*/
|
||||
/*if(ili9341_drv.ReadID() == ILI9341_ID)*/
|
||||
|
||||
/* LTDC Configuration ----------------------------------------------------*/
|
||||
LtdcHandler.Instance = LTDC;
|
||||
|
||||
/* Timing configuration (Typical configuration from ILI9341 datasheet)
|
||||
HSYNC=10 (9+1)
|
||||
HBP=20 (29-10+1)
|
||||
ActiveW=240 (269-20-10+1)
|
||||
HFP=10 (279-240-20-10+1)
|
||||
|
||||
VSYNC=2 (1+1)
|
||||
VBP=2 (3-2+1)
|
||||
ActiveH=320 (323-2-2+1)
|
||||
VFP=4 (327-320-2-2+1)
|
||||
*/
|
||||
|
||||
/* Configure horizontal synchronization width */
|
||||
LtdcHandler.Init.HorizontalSync = ILI9341_HSYNC;
|
||||
/* Configure vertical synchronization height */
|
||||
LtdcHandler.Init.VerticalSync = ILI9341_VSYNC;
|
||||
/* Configure accumulated horizontal back porch */
|
||||
LtdcHandler.Init.AccumulatedHBP = ILI9341_HBP;
|
||||
/* Configure accumulated vertical back porch */
|
||||
LtdcHandler.Init.AccumulatedVBP = ILI9341_VBP;
|
||||
/* Configure accumulated active width */
|
||||
LtdcHandler.Init.AccumulatedActiveW = 269;
|
||||
/* Configure accumulated active height */
|
||||
LtdcHandler.Init.AccumulatedActiveH = 323;
|
||||
/* Configure total width */
|
||||
LtdcHandler.Init.TotalWidth = 279;
|
||||
/* Configure total height */
|
||||
LtdcHandler.Init.TotalHeigh = 327;
|
||||
|
||||
/* Configure R,G,B component values for LCD background color */
|
||||
LtdcHandler.Init.Backcolor.Red = 0;
|
||||
LtdcHandler.Init.Backcolor.Blue = 0;
|
||||
LtdcHandler.Init.Backcolor.Green = 0;
|
||||
|
||||
/* LCD clock configuration */
|
||||
/* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz */
|
||||
/* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 192 Mhz */
|
||||
/* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 192/4 = 48 Mhz */
|
||||
/* LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_8 = 48/4 = 6Mhz */
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIR = 4;
|
||||
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;
|
||||
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
|
||||
|
||||
/* Polarity */
|
||||
LtdcHandler.Init.HSPolarity = LTDC_HSPOLARITY_AL;
|
||||
LtdcHandler.Init.VSPolarity = LTDC_VSPOLARITY_AL;
|
||||
LtdcHandler.Init.DEPolarity = LTDC_DEPOLARITY_AL;
|
||||
LtdcHandler.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
|
||||
|
||||
HAL_LTDC_Init(&LtdcHandler);
|
||||
|
||||
/* Initialize the LCD Layers */
|
||||
BSP_LCD_LayerDefaultInit(1, LCD_FRAME_BUFFER);
|
||||
|
||||
memzero((void *)LCD_FRAME_BUFFER, 153600);
|
||||
|
||||
ili9341_init();
|
||||
|
||||
display_init_seq();
|
||||
}
|
||||
|
||||
void display_reinit(void) {}
|
||||
|
||||
void display_refresh(void) {}
|
||||
|
||||
void display_sync(void) {}
|
||||
|
||||
const char *display_save(const char *prefix) { return NULL; }
|
||||
|
||||
void display_clear_save(void) {}
|
||||
@ -0,0 +1,15 @@
|
||||
|
||||
#ifndef _LTDC_H
|
||||
#define _LTDC_H
|
||||
|
||||
#include STM32_HAL_H
|
||||
|
||||
#define MAX_DISPLAY_RESX 240
|
||||
#define MAX_DISPLAY_RESY 320
|
||||
#define DISPLAY_RESX 240
|
||||
#define DISPLAY_RESY 240
|
||||
#define TREZOR_FONT_BPP 4
|
||||
|
||||
extern uint8_t *const DISPLAY_DATA_ADDRESS;
|
||||
|
||||
#endif //_LTDC_H
|
||||
@ -0,0 +1,445 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f429i_discovery_sdram.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file provides a set of functions needed to drive the
|
||||
* IS42S16400J SDRAM memory mounted on STM32F429I-Discovery Kit.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "sdram.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F429I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM STM32F429I DISCOVERY SDRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Private_Types_Definitions STM32F429I
|
||||
* DISCOVERY SDRAM Private Types Definitions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Private_Defines STM32F429I DISCOVERY
|
||||
* SDRAM Private Defines
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Private_Macros STM32F429I DISCOVERY
|
||||
* SDRAM Private Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Private_Variables STM32F429I DISCOVERY
|
||||
* SDRAM Private Variables
|
||||
* @{
|
||||
*/
|
||||
static SDRAM_HandleTypeDef SdramHandle;
|
||||
static FMC_SDRAM_TimingTypeDef Timing;
|
||||
static FMC_SDRAM_CommandTypeDef Command;
|
||||
|
||||
void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Private_Function_Prototypes STM32F429I
|
||||
* DISCOVERY SDRAM Private Function Prototypes
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Private_Functions STM32F429I DISCOVERY
|
||||
* SDRAM Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the SDRAM device.
|
||||
*/
|
||||
void sdram_init(void) {
|
||||
static uint8_t sdramstatus = SDRAM_ERROR;
|
||||
|
||||
/* SDRAM device configuration */
|
||||
SdramHandle.Instance = FMC_SDRAM_DEVICE;
|
||||
|
||||
/* FMC Configuration -------------------------------------------------------*/
|
||||
/* FMC SDRAM Bank configuration */
|
||||
/* Timing configuration for 90 Mhz of SD clock frequency (180Mhz/2) */
|
||||
/* TMRD: 2 Clock cycles */
|
||||
Timing.LoadToActiveDelay = 2;
|
||||
/* TXSR: min=70ns (7x11.11ns) */
|
||||
Timing.ExitSelfRefreshDelay = 7;
|
||||
/* TRAS: min=42ns (4x11.11ns) max=120k (ns) */
|
||||
Timing.SelfRefreshTime = 4;
|
||||
/* TRC: min=70 (7x11.11ns) */
|
||||
Timing.RowCycleDelay = 7;
|
||||
/* TWR: min=1+ 7ns (1+1x11.11ns) */
|
||||
Timing.WriteRecoveryTime = 2;
|
||||
/* TRP: 20ns => 2x11.11ns*/
|
||||
Timing.RPDelay = 2;
|
||||
/* TRCD: 20ns => 2x11.11ns */
|
||||
Timing.RCDDelay = 2;
|
||||
|
||||
/* FMC SDRAM control configuration */
|
||||
SdramHandle.Init.SDBank = FMC_SDRAM_BANK2;
|
||||
/* Row addressing: [7:0] */
|
||||
SdramHandle.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
|
||||
/* Column addressing: [11:0] */
|
||||
SdramHandle.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
|
||||
SdramHandle.Init.MemoryDataWidth = SDRAM_MEMORY_WIDTH;
|
||||
SdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
|
||||
SdramHandle.Init.CASLatency = SDRAM_CAS_LATENCY;
|
||||
SdramHandle.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
|
||||
SdramHandle.Init.SDClockPeriod = SDCLOCK_PERIOD;
|
||||
SdramHandle.Init.ReadBurst = SDRAM_READBURST;
|
||||
SdramHandle.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
|
||||
|
||||
/* SDRAM controller initialization */
|
||||
/* __weak function can be surcharged by the application code */
|
||||
BSP_SDRAM_MspInit(&SdramHandle, (void *)NULL);
|
||||
if (HAL_SDRAM_Init(&SdramHandle, &Timing) != HAL_OK) {
|
||||
sdramstatus = SDRAM_ERROR;
|
||||
} else {
|
||||
sdramstatus = SDRAM_OK;
|
||||
}
|
||||
|
||||
/* SDRAM initialization sequence */
|
||||
BSP_SDRAM_Initialization_sequence(REFRESH_COUNT);
|
||||
|
||||
(void)sdramstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Programs the SDRAM device.
|
||||
* @param RefreshCount: SDRAM refresh counter value
|
||||
*/
|
||||
void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount) {
|
||||
__IO uint32_t tmpmrd = 0;
|
||||
|
||||
/* Step 1: Configure a clock configuration enable command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 1;
|
||||
Command.ModeRegisterDefinition = 0;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&SdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 2: Insert 100 us minimum delay */
|
||||
/* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
|
||||
HAL_Delay(1);
|
||||
|
||||
/* Step 3: Configure a PALL (precharge all) command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_PALL;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 1;
|
||||
Command.ModeRegisterDefinition = 0;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&SdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 4: Configure an Auto Refresh command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 4;
|
||||
Command.ModeRegisterDefinition = 0;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&SdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 5: Program the external memory mode register */
|
||||
tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |
|
||||
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | SDRAM_MODEREG_CAS_LATENCY_3 |
|
||||
SDRAM_MODEREG_OPERATING_MODE_STANDARD |
|
||||
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
|
||||
|
||||
Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 1;
|
||||
Command.ModeRegisterDefinition = tmpmrd;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&SdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 6: Set the refresh rate counter */
|
||||
/* Set the device refresh rate */
|
||||
HAL_SDRAM_ProgramRefreshRate(&SdramHandle, RefreshCount);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads an mount of data from the SDRAM memory in polling mode.
|
||||
* @param uwStartAddress : Read start address
|
||||
* @param pData : Pointer to data to be read
|
||||
* @param uwDataSize: Size of read data from the memory
|
||||
*/
|
||||
uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData,
|
||||
uint32_t uwDataSize) {
|
||||
if (HAL_SDRAM_Read_32b(&SdramHandle, (uint32_t *)uwStartAddress, pData,
|
||||
uwDataSize) != HAL_OK) {
|
||||
return SDRAM_ERROR;
|
||||
} else {
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads an mount of data from the SDRAM memory in DMA mode.
|
||||
* @param uwStartAddress : Read start address
|
||||
* @param pData : Pointer to data to be read
|
||||
* @param uwDataSize: Size of read data from the memory
|
||||
*/
|
||||
uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData,
|
||||
uint32_t uwDataSize) {
|
||||
if (HAL_SDRAM_Read_DMA(&SdramHandle, (uint32_t *)uwStartAddress, pData,
|
||||
uwDataSize) != HAL_OK) {
|
||||
return SDRAM_ERROR;
|
||||
} else {
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes an mount of data to the SDRAM memory in polling mode.
|
||||
* @param uwStartAddress : Write start address
|
||||
* @param pData : Pointer to data to be written
|
||||
* @param uwDataSize: Size of written data from the memory
|
||||
*/
|
||||
uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData,
|
||||
uint32_t uwDataSize) {
|
||||
/* Disable write protection */
|
||||
HAL_SDRAM_WriteProtection_Disable(&SdramHandle);
|
||||
|
||||
/*Write 32-bit data buffer to SDRAM memory*/
|
||||
if (HAL_SDRAM_Write_32b(&SdramHandle, (uint32_t *)uwStartAddress, pData,
|
||||
uwDataSize) != HAL_OK) {
|
||||
return SDRAM_ERROR;
|
||||
} else {
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes an mount of data to the SDRAM memory in DMA mode.
|
||||
* @param uwStartAddress : Write start address
|
||||
* @param pData : Pointer to data to be written
|
||||
* @param uwDataSize: Size of written data from the memory
|
||||
*/
|
||||
uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData,
|
||||
uint32_t uwDataSize) {
|
||||
if (HAL_SDRAM_Write_DMA(&SdramHandle, (uint32_t *)uwStartAddress, pData,
|
||||
uwDataSize) != HAL_OK) {
|
||||
return SDRAM_ERROR;
|
||||
} else {
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends command to the SDRAM bank.
|
||||
* @param SdramCmd: Pointer to SDRAM command structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd) {
|
||||
if (HAL_SDRAM_SendCommand(&SdramHandle, SdramCmd, SDRAM_TIMEOUT) != HAL_OK) {
|
||||
return SDRAM_ERROR;
|
||||
} else {
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Handles SDRAM DMA transfer interrupt request.
|
||||
*/
|
||||
void BSP_SDRAM_DMA_IRQHandler(void) { HAL_DMA_IRQHandler(SdramHandle.hdma); }
|
||||
|
||||
/**
|
||||
* @brief Initializes SDRAM MSP.
|
||||
* @note This function can be surcharged by application code.
|
||||
* @param hsdram: pointer on SDRAM handle
|
||||
* @param Params: pointer on additional configuration parameters, can be NULL.
|
||||
*/
|
||||
void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params) {
|
||||
static DMA_HandleTypeDef dmaHandle;
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
if (hsdram != (SDRAM_HandleTypeDef *)NULL) {
|
||||
/* Enable FMC clock */
|
||||
__HAL_RCC_FMC_CLK_ENABLE();
|
||||
|
||||
/* Enable chosen DMAx clock */
|
||||
__DMAx_CLK_ENABLE();
|
||||
|
||||
/* Enable GPIOs clock */
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
|
||||
/*-- GPIOs Configuration
|
||||
* -----------------------------------------------------*/
|
||||
/*
|
||||
+-------------------+--------------------+--------------------+--------------------+
|
||||
+ SDRAM pins assignment +
|
||||
+-------------------+--------------------+--------------------+--------------------+
|
||||
| PD0 <-> FMC_D2 | PE0 <-> FMC_NBL0 | PF0 <-> FMC_A0 | PG0 <->
|
||||
FMC_A10 | | PD1 <-> FMC_D3 | PE1 <-> FMC_NBL1 | PF1 <-> FMC_A1 |
|
||||
PG1 <-> FMC_A11 | | PD8 <-> FMC_D13 | PE7 <-> FMC_D4 | PF2 <->
|
||||
FMC_A2 | PG8 <-> FMC_SDCLK | | PD9 <-> FMC_D14 | PE8 <-> FMC_D5 |
|
||||
PF3 <-> FMC_A3 | PG15 <-> FMC_NCAS | | PD10 <-> FMC_D15 | PE9 <->
|
||||
FMC_D6 | PF4 <-> FMC_A4 |--------------------+ | PD14 <-> FMC_D0 |
|
||||
PE10 <-> FMC_D7 | PF5 <-> FMC_A5 | | PD15 <-> FMC_D1 | PE11 <->
|
||||
FMC_D8 | PF11 <-> FMC_NRAS |
|
||||
+-------------------| PE12 <-> FMC_D9 | PF12 <-> FMC_A6 |
|
||||
| PE13 <-> FMC_D10 | PF13 <-> FMC_A7 |
|
||||
| PE14 <-> FMC_D11 | PF14 <-> FMC_A8 |
|
||||
| PE15 <-> FMC_D12 | PF15 <-> FMC_A9 |
|
||||
+-------------------+--------------------+--------------------+
|
||||
| PB5 <-> FMC_SDCKE1|
|
||||
| PB6 <-> FMC_SDNE1 |
|
||||
| PC0 <-> FMC_SDNWE |
|
||||
+-------------------+
|
||||
|
||||
*/
|
||||
|
||||
/* Common GPIO configuration */
|
||||
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
|
||||
GPIO_InitStructure.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStructure.Alternate = GPIO_AF12_FMC;
|
||||
|
||||
/* GPIOB configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_5 | GPIO_PIN_6;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOC configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_0;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOD configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 |
|
||||
GPIO_PIN_10 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOE configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7 | GPIO_PIN_8 |
|
||||
GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 |
|
||||
GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |
|
||||
GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOF configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 |
|
||||
GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_11 |
|
||||
GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |
|
||||
GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStructure);
|
||||
|
||||
/* GPIOG configuration */
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 |
|
||||
GPIO_PIN_8 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
|
||||
|
||||
/* Configure common DMA parameters */
|
||||
dmaHandle.Init.Channel = SDRAM_DMAx_CHANNEL;
|
||||
dmaHandle.Init.Direction = DMA_MEMORY_TO_MEMORY;
|
||||
dmaHandle.Init.PeriphInc = DMA_PINC_ENABLE;
|
||||
dmaHandle.Init.MemInc = DMA_MINC_ENABLE;
|
||||
dmaHandle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
|
||||
dmaHandle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
|
||||
dmaHandle.Init.Mode = DMA_NORMAL;
|
||||
dmaHandle.Init.Priority = DMA_PRIORITY_HIGH;
|
||||
dmaHandle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
dmaHandle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
dmaHandle.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
dmaHandle.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
|
||||
dmaHandle.Instance = SDRAM_DMAx_STREAM;
|
||||
|
||||
/* Associate the DMA handle */
|
||||
__HAL_LINKDMA(hsdram, hdma, dmaHandle);
|
||||
|
||||
/* Deinitialize the stream for new transfer */
|
||||
HAL_DMA_DeInit(&dmaHandle);
|
||||
|
||||
/* Configure the DMA stream */
|
||||
HAL_DMA_Init(&dmaHandle);
|
||||
|
||||
/* NVIC configuration for DMA transfer complete interrupt */
|
||||
HAL_NVIC_SetPriority(SDRAM_DMAx_IRQn, 0x0F, 0);
|
||||
HAL_NVIC_EnableIRQ(SDRAM_DMAx_IRQn);
|
||||
} /* of if(hsdram != (SDRAM_HandleTypeDef *)NULL) */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes SDRAM MSP.
|
||||
* @note This function can be surcharged by application code.
|
||||
* @param hsdram: pointer on SDRAM handle
|
||||
* @param Params: pointer on additional configuration parameters, can be NULL.
|
||||
*/
|
||||
void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params) {
|
||||
static DMA_HandleTypeDef dma_handle;
|
||||
|
||||
if (hsdram != (SDRAM_HandleTypeDef *)NULL) {
|
||||
/* Disable NVIC configuration for DMA interrupt */
|
||||
HAL_NVIC_DisableIRQ(SDRAM_DMAx_IRQn);
|
||||
|
||||
/* Deinitialize the stream for new transfer */
|
||||
dma_handle.Instance = SDRAM_DMAx_STREAM;
|
||||
HAL_DMA_DeInit(&dma_handle);
|
||||
|
||||
/* DeInit GPIO pins can be done in the application
|
||||
(by surcharging this __weak function) */
|
||||
|
||||
/* GPIO pins clock, FMC clock and DMA clock can be shut down in the
|
||||
application by surcharging this __weak function */
|
||||
|
||||
} /* of if(hsdram != (SDRAM_HandleTypeDef *)NULL) */
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@ -0,0 +1,177 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f429i_discovery_sdram.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains all the functions prototypes for the
|
||||
* stm32f429i_discovery_sdram.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F429I_DISCOVERY_SDRAM_H
|
||||
#define __STM32F429I_DISCOVERY_SDRAM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include STM32_HAL_H
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F429I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F429I_DISCOVERY_SDRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Exported_Types STM32F429I DISCOVERY
|
||||
* SDRAM Exported Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Exported_Constants STM32F429I DISCOVERY
|
||||
* SDRAM Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SDRAM status structure definition
|
||||
*/
|
||||
#define SDRAM_OK ((uint8_t)0x00)
|
||||
#define SDRAM_ERROR ((uint8_t)0x01)
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Bank address
|
||||
*/
|
||||
#define SDRAM_DEVICE_ADDR ((uint32_t)0xD0000000)
|
||||
#define SDRAM_DEVICE_SIZE \
|
||||
((uint32_t)0x800000) /* SDRAM device size in Bytes \
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Memory Width
|
||||
*/
|
||||
/* #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_8 */
|
||||
#define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_16
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM CAS Latency
|
||||
*/
|
||||
/* #define SDRAM_CAS_LATENCY FMC_SDRAM_CAS_LATENCY_2 */
|
||||
#define SDRAM_CAS_LATENCY FMC_SDRAM_CAS_LATENCY_3
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Memory clock period
|
||||
*/
|
||||
#define SDCLOCK_PERIOD \
|
||||
FMC_SDRAM_CLOCK_PERIOD_2 /* Default configuration used with LCD */
|
||||
/* #define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_3 */
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Memory Read Burst feature
|
||||
*/
|
||||
#define SDRAM_READBURST \
|
||||
FMC_SDRAM_RBURST_DISABLE /* Default configuration used with LCD */
|
||||
/* #define SDRAM_READBURST FMC_SDRAM_RBURST_ENABLE */
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Bank Remap
|
||||
*/
|
||||
/* #define SDRAM_BANK_REMAP */
|
||||
|
||||
/* Set the refresh rate counter */
|
||||
/* (15.62 us x Freq) - 20 */
|
||||
#define REFRESH_COUNT ((uint32_t)1386) /* SDRAM refresh counter */
|
||||
#define SDRAM_TIMEOUT ((uint32_t)0xFFFF)
|
||||
|
||||
/* DMA definitions for SDRAM DMA transfer */
|
||||
#define __DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
|
||||
#define SDRAM_DMAx_CHANNEL DMA_CHANNEL_0
|
||||
#define SDRAM_DMAx_STREAM DMA2_Stream0
|
||||
#define SDRAM_DMAx_IRQn DMA2_Stream0_IRQn
|
||||
#define SDRAM_DMAx_IRQHandler DMA2_Stream0_IRQHandler
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Mode definition register defines
|
||||
*/
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
|
||||
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
|
||||
#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
|
||||
#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
|
||||
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Exported_Macro STM32F429I DISCOVERY
|
||||
* SDRAM Exported Macro
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32F429I_DISCOVERY_SDRAM_Exported_Functions STM32F429I DISCOVERY
|
||||
* SDRAM Exported Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_SDRAM_Init(void);
|
||||
void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount);
|
||||
uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t* pData,
|
||||
uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t* pData,
|
||||
uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t* pData,
|
||||
uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t* pData,
|
||||
uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef* SdramCmd);
|
||||
void BSP_SDRAM_DMA_IRQHandler(void);
|
||||
|
||||
void sdram_init(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F429I_DISCOVERY_SDRAM_H */
|
||||
@ -0,0 +1,700 @@
|
||||
/*
|
||||
* This file is part of the Trezor project, https://trezor.io/
|
||||
*
|
||||
* Copyright (c) SatoshiLabs
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include STM32_HAL_H
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "secbool.h"
|
||||
|
||||
#include "i2c.h"
|
||||
#include "stmpe811.h"
|
||||
#include "touch.h"
|
||||
|
||||
/* Chip IDs */
|
||||
#define STMPE811_ID 0x0811
|
||||
|
||||
/* Identification registers & System Control */
|
||||
#define STMPE811_REG_CHP_ID_LSB 0x00
|
||||
#define STMPE811_REG_CHP_ID_MSB 0x01
|
||||
#define STMPE811_REG_ID_VER 0x02
|
||||
|
||||
/* Global interrupt Enable bit */
|
||||
#define STMPE811_GIT_EN 0x01
|
||||
|
||||
/* IO expander functionalities */
|
||||
#define STMPE811_ADC_FCT 0x01
|
||||
#define STMPE811_TS_FCT 0x02
|
||||
#define STMPE811_IO_FCT 0x04
|
||||
#define STMPE811_TEMPSENS_FCT 0x08
|
||||
|
||||
/* Global Interrupts definitions */
|
||||
#define STMPE811_GIT_IO 0x80 /* IO interrupt */
|
||||
#define STMPE811_GIT_ADC 0x40 /* ADC interrupt */
|
||||
#define STMPE811_GIT_TEMP 0x20 /* Not implemented */
|
||||
#define STMPE811_GIT_FE 0x10 /* FIFO empty interrupt */
|
||||
#define STMPE811_GIT_FF 0x08 /* FIFO full interrupt */
|
||||
#define STMPE811_GIT_FOV 0x04 /* FIFO overflowed interrupt */
|
||||
#define STMPE811_GIT_FTH 0x02 /* FIFO above threshold interrupt */
|
||||
#define STMPE811_GIT_TOUCH 0x01 /* Touch is detected interrupt */
|
||||
#define STMPE811_ALL_GIT 0x1F /* All global interrupts */
|
||||
#define STMPE811_TS_IT \
|
||||
(STMPE811_GIT_TOUCH | STMPE811_GIT_FTH | STMPE811_GIT_FOV | \
|
||||
STMPE811_GIT_FF | STMPE811_GIT_FE) /* Touch screen interrupts */
|
||||
|
||||
/* General Control Registers */
|
||||
#define STMPE811_REG_SYS_CTRL1 0x03
|
||||
#define STMPE811_REG_SYS_CTRL2 0x04
|
||||
#define STMPE811_REG_SPI_CFG 0x08
|
||||
|
||||
/* Interrupt system Registers */
|
||||
#define STMPE811_REG_INT_CTRL 0x09
|
||||
#define STMPE811_REG_INT_EN 0x0A
|
||||
#define STMPE811_REG_INT_STA 0x0B
|
||||
#define STMPE811_REG_IO_INT_EN 0x0C
|
||||
#define STMPE811_REG_IO_INT_STA 0x0D
|
||||
|
||||
/* IO Registers */
|
||||
#define STMPE811_REG_IO_SET_PIN 0x10
|
||||
#define STMPE811_REG_IO_CLR_PIN 0x11
|
||||
#define STMPE811_REG_IO_MP_STA 0x12
|
||||
#define STMPE811_REG_IO_DIR 0x13
|
||||
#define STMPE811_REG_IO_ED 0x14
|
||||
#define STMPE811_REG_IO_RE 0x15
|
||||
#define STMPE811_REG_IO_FE 0x16
|
||||
#define STMPE811_REG_IO_AF 0x17
|
||||
|
||||
/* ADC Registers */
|
||||
#define STMPE811_REG_ADC_INT_EN 0x0E
|
||||
#define STMPE811_REG_ADC_INT_STA 0x0F
|
||||
#define STMPE811_REG_ADC_CTRL1 0x20
|
||||
#define STMPE811_REG_ADC_CTRL2 0x21
|
||||
#define STMPE811_REG_ADC_CAPT 0x22
|
||||
#define STMPE811_REG_ADC_DATA_CH0 0x30
|
||||
#define STMPE811_REG_ADC_DATA_CH1 0x32
|
||||
#define STMPE811_REG_ADC_DATA_CH2 0x34
|
||||
#define STMPE811_REG_ADC_DATA_CH3 0x36
|
||||
#define STMPE811_REG_ADC_DATA_CH4 0x38
|
||||
#define STMPE811_REG_ADC_DATA_CH5 0x3A
|
||||
#define STMPE811_REG_ADC_DATA_CH6 0x3B
|
||||
#define STMPE811_REG_ADC_DATA_CH7 0x3C
|
||||
|
||||
/* Touch Screen Registers */
|
||||
#define STMPE811_REG_TSC_CTRL 0x40
|
||||
#define STMPE811_REG_TSC_CFG 0x41
|
||||
#define STMPE811_REG_WDM_TR_X 0x42
|
||||
#define STMPE811_REG_WDM_TR_Y 0x44
|
||||
#define STMPE811_REG_WDM_BL_X 0x46
|
||||
#define STMPE811_REG_WDM_BL_Y 0x48
|
||||
#define STMPE811_REG_FIFO_TH 0x4A
|
||||
#define STMPE811_REG_FIFO_STA 0x4B
|
||||
#define STMPE811_REG_FIFO_SIZE 0x4C
|
||||
#define STMPE811_REG_TSC_DATA_X 0x4D
|
||||
#define STMPE811_REG_TSC_DATA_Y 0x4F
|
||||
#define STMPE811_REG_TSC_DATA_Z 0x51
|
||||
#define STMPE811_REG_TSC_DATA_XYZ 0x52
|
||||
#define STMPE811_REG_TSC_FRACT_XYZ 0x56
|
||||
#define STMPE811_REG_TSC_DATA_INC 0x57
|
||||
#define STMPE811_REG_TSC_DATA_NON_INC 0xD7
|
||||
#define STMPE811_REG_TSC_I_DRIVE 0x58
|
||||
#define STMPE811_REG_TSC_SHIELD 0x59
|
||||
|
||||
/* Touch Screen Pins definition */
|
||||
#define STMPE811_TOUCH_YD STMPE811_PIN_7
|
||||
#define STMPE811_TOUCH_XD STMPE811_PIN_6
|
||||
#define STMPE811_TOUCH_YU STMPE811_PIN_5
|
||||
#define STMPE811_TOUCH_XU STMPE811_PIN_4
|
||||
#define STMPE811_TOUCH_IO_ALL \
|
||||
(uint32_t)(STMPE811_TOUCH_YD | STMPE811_TOUCH_XD | STMPE811_TOUCH_YU | \
|
||||
STMPE811_TOUCH_XU)
|
||||
|
||||
/* IO Pins definition */
|
||||
#define STMPE811_PIN_0 0x01
|
||||
#define STMPE811_PIN_1 0x02
|
||||
#define STMPE811_PIN_2 0x04
|
||||
#define STMPE811_PIN_3 0x08
|
||||
#define STMPE811_PIN_4 0x10
|
||||
#define STMPE811_PIN_5 0x20
|
||||
#define STMPE811_PIN_6 0x40
|
||||
#define STMPE811_PIN_7 0x80
|
||||
#define STMPE811_PIN_ALL 0xFF
|
||||
|
||||
/* IO Pins directions */
|
||||
#define STMPE811_DIRECTION_IN 0x00
|
||||
#define STMPE811_DIRECTION_OUT 0x01
|
||||
|
||||
/* IO IT types */
|
||||
#define STMPE811_TYPE_LEVEL 0x00
|
||||
#define STMPE811_TYPE_EDGE 0x02
|
||||
|
||||
/* IO IT polarity */
|
||||
#define STMPE811_POLARITY_LOW 0x00
|
||||
#define STMPE811_POLARITY_HIGH 0x04
|
||||
|
||||
/* IO Pin IT edge modes */
|
||||
#define STMPE811_EDGE_FALLING 0x01
|
||||
#define STMPE811_EDGE_RISING 0x02
|
||||
|
||||
/* TS registers masks */
|
||||
#define STMPE811_TS_CTRL_ENABLE 0x01
|
||||
#define STMPE811_TS_CTRL_STATUS 0x80
|
||||
|
||||
#define TOUCH_ADDRESS \
|
||||
(0x38U << 1) // the HAL requires the 7-bit address to be shifted by one bit
|
||||
#define TOUCH_PACKET_SIZE 7U
|
||||
#define EVENT_PRESS_DOWN 0x00U
|
||||
#define EVENT_CONTACT 0x80U
|
||||
#define EVENT_LIFT_UP 0x40U
|
||||
#define EVENT_NO_EVENT 0xC0U
|
||||
#define GESTURE_NO_GESTURE 0x00U
|
||||
#define X_POS_MSB (touch_data[3] & 0x0FU)
|
||||
#define X_POS_LSB (touch_data[4])
|
||||
#define Y_POS_MSB (touch_data[5] & 0x0FU)
|
||||
#define Y_POS_LSB (touch_data[6])
|
||||
|
||||
#define EVENT_OLD_TIMEOUT_MS 50
|
||||
#define EVENT_MISSING_TIMEOUT_MS 50
|
||||
|
||||
#define TS_I2C_ADDRESS 0x82
|
||||
|
||||
#define I2Cx_TIMEOUT_MAX \
|
||||
0x3000 /*<! The value of the maximal timeout for I2C waiting loops */
|
||||
uint32_t I2cxTimeout =
|
||||
I2Cx_TIMEOUT_MAX; /*<! Value of Timeout when I2C communication fails */
|
||||
|
||||
/**
|
||||
* @brief I2Cx error treatment function
|
||||
*/
|
||||
static void I2Cx_Error(void) { i2c_cycle(); }
|
||||
|
||||
/**
|
||||
* @brief Writes a value in a register of the device through BUS.
|
||||
* @param Addr: Device address on BUS Bus.
|
||||
* @param Reg: The target register address to write
|
||||
* @param Value: The target register value to be written
|
||||
*/
|
||||
static void I2Cx_WriteData(uint8_t Addr, uint8_t Reg, uint8_t Value) {
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
status = i2c_mem_write(Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, &Value, 1,
|
||||
I2cxTimeout);
|
||||
|
||||
/* Check the communication status */
|
||||
if (status != HAL_OK) {
|
||||
/* Re-Initialize the BUS */
|
||||
I2Cx_Error();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes a value in a register of the device through BUS.
|
||||
* @param Addr: Device address on BUS Bus.
|
||||
* @param Reg: The target register address to write
|
||||
* @param pBuffer: The target register value to be written
|
||||
* @param Length: buffer size to be written
|
||||
*/
|
||||
static void I2Cx_WriteBuffer(uint8_t Addr, uint8_t Reg, uint8_t *pBuffer,
|
||||
uint16_t Length) {
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
status = i2c_mem_write(Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, pBuffer,
|
||||
Length, I2cxTimeout);
|
||||
|
||||
/* Check the communication status */
|
||||
if (status != HAL_OK) {
|
||||
/* Re-Initialize the BUS */
|
||||
I2Cx_Error();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads a register of the device through BUS.
|
||||
* @param Addr: Device address on BUS Bus.
|
||||
* @param Reg: The target register address to write
|
||||
* @retval Data read at register address
|
||||
*/
|
||||
static uint8_t I2Cx_ReadData(uint8_t Addr, uint8_t Reg) {
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint8_t value = 0;
|
||||
|
||||
status =
|
||||
i2c_mem_read(Addr, Reg, I2C_MEMADD_SIZE_8BIT, &value, 1, I2cxTimeout);
|
||||
|
||||
/* Check the communication status */
|
||||
if (status != HAL_OK) {
|
||||
/* Re-Initialize the BUS */
|
||||
I2Cx_Error();
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads multiple data on the BUS.
|
||||
* @param Addr: I2C Address
|
||||
* @param Reg: Reg Address
|
||||
* @param pBuffer: pointer to read data buffer
|
||||
* @param Length: length of the data
|
||||
* @retval 0 if no problems to read multiple data
|
||||
*/
|
||||
static uint8_t I2Cx_ReadBuffer(uint8_t Addr, uint8_t Reg, uint8_t *pBuffer,
|
||||
uint16_t Length) {
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
status = i2c_mem_read(Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, pBuffer,
|
||||
Length, I2cxTimeout);
|
||||
|
||||
/* Check the communication status */
|
||||
if (status == HAL_OK) {
|
||||
return 0;
|
||||
} else {
|
||||
/* Re-Initialize the BUS */
|
||||
I2Cx_Error();
|
||||
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
/**
|
||||
* @brief IOE Writes single data operation.
|
||||
* @param Addr: I2C Address
|
||||
* @param Reg: Reg Address
|
||||
* @param Value: Data to be written
|
||||
*/
|
||||
void IOE_Write(uint8_t Addr, uint8_t Reg, uint8_t Value) {
|
||||
I2Cx_WriteData(Addr, Reg, Value);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IOE Reads single data.
|
||||
* @param Addr: I2C Address
|
||||
* @param Reg: Reg Address
|
||||
* @retval The read data
|
||||
*/
|
||||
uint8_t IOE_Read(uint8_t Addr, uint8_t Reg) { return I2Cx_ReadData(Addr, Reg); }
|
||||
|
||||
/**
|
||||
* @brief IOE Writes multiple data.
|
||||
* @param Addr: I2C Address
|
||||
* @param Reg: Reg Address
|
||||
* @param pBuffer: pointer to data buffer
|
||||
* @param Length: length of the data
|
||||
*/
|
||||
void IOE_WriteMultiple(uint8_t Addr, uint8_t Reg, uint8_t *pBuffer,
|
||||
uint16_t Length) {
|
||||
I2Cx_WriteBuffer(Addr, Reg, pBuffer, Length);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IOE Reads multiple data.
|
||||
* @param Addr: I2C Address
|
||||
* @param Reg: Reg Address
|
||||
* @param pBuffer: pointer to data buffer
|
||||
* @param Length: length of the data
|
||||
* @retval 0 if no problems to read multiple data
|
||||
*/
|
||||
uint16_t IOE_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *pBuffer,
|
||||
uint16_t Length) {
|
||||
return I2Cx_ReadBuffer(Addr, Reg, pBuffer, Length);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IOE Delay.
|
||||
* @param Delay in ms
|
||||
*/
|
||||
void IOE_Delay(uint32_t Delay) { HAL_Delay(Delay); }
|
||||
|
||||
static void touch_active_pin_state(void) {
|
||||
// HAL_GPIO_WritePin(GPIOB, GPIO_PIN_10, GPIO_PIN_RESET); // CTP_ON/PB10
|
||||
// HAL_Delay(10); // we need to wait until the circuit fully kicks-in
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
// PC4 capacitive touch panel module (CTPM) interrupt (INT) input
|
||||
GPIO_InitStructure.Mode = GPIO_MODE_IT_FALLING;
|
||||
GPIO_InitStructure.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
__HAL_GPIO_EXTI_CLEAR_FLAG(GPIO_PIN_15);
|
||||
|
||||
// HAL_GPIO_WritePin(GPIOC, GPIO_PIN_5, GPIO_PIN_SET); // release CTPM reset
|
||||
// HAL_Delay(310); // "Time of starting to report point after resetting" min
|
||||
// is
|
||||
// 300ms, giving an extra 10ms
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable the AF for the selected IO pin(s).
|
||||
* @param DeviceAddr: Device address on communication Bus.
|
||||
* @param IO_Pin: The IO pin to be configured. This parameter could be any
|
||||
* combination of the following values:
|
||||
* @arg STMPE811_PIN_x: Where x can be from 0 to 7.
|
||||
* @retval None
|
||||
*/
|
||||
void stmpe811_IO_EnableAF(uint16_t DeviceAddr, uint32_t IO_Pin) {
|
||||
uint8_t tmp = 0;
|
||||
|
||||
/* Get the current register value */
|
||||
tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_AF);
|
||||
|
||||
/* Enable the selected pins alternate function */
|
||||
tmp &= ~(uint8_t)IO_Pin;
|
||||
|
||||
/* Write back the new register value */
|
||||
IOE_Write(DeviceAddr, STMPE811_REG_IO_AF, tmp);
|
||||
}
|
||||
|
||||
void touch_set_mode(void) {
|
||||
// set register 0xA4 G_MODE to interrupt trigger mode (0x01). basically, CTPM
|
||||
// generates a pulse when new data is available
|
||||
// uint8_t touch_panel_config[] = {0xA4, 0x01};
|
||||
// ensure(
|
||||
// sectrue * (HAL_OK == HAL_I2C_Master_Transmit(
|
||||
// &I2c_handle, TOUCH_ADDRESS, touch_panel_config,
|
||||
// sizeof(touch_panel_config), 10)),
|
||||
// NULL);
|
||||
|
||||
uint8_t mode;
|
||||
|
||||
/* Get the current register value */
|
||||
mode = IOE_Read(TS_I2C_ADDRESS, STMPE811_REG_SYS_CTRL2);
|
||||
|
||||
/* Set the Functionalities to be Enabled */
|
||||
mode &= ~(STMPE811_IO_FCT);
|
||||
|
||||
/* Write the new register value */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_SYS_CTRL2, mode);
|
||||
|
||||
/* Select TSC pins in TSC alternate mode */
|
||||
stmpe811_IO_EnableAF(TS_I2C_ADDRESS, STMPE811_TOUCH_IO_ALL);
|
||||
|
||||
/* Set the Functionalities to be Enabled */
|
||||
mode &= ~(STMPE811_TS_FCT | STMPE811_ADC_FCT);
|
||||
|
||||
/* Set the new register value */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_SYS_CTRL2, mode);
|
||||
|
||||
/* Select Sample Time, bit number and ADC Reference */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_ADC_CTRL1, 0x49);
|
||||
|
||||
/* Wait for 2 ms */
|
||||
IOE_Delay(2);
|
||||
|
||||
/* Select the ADC clock speed: 3.25 MHz */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_ADC_CTRL2, 0x01);
|
||||
|
||||
/* Select 2 nF filter capacitor */
|
||||
/* Configuration:
|
||||
- Touch average control : 4 samples
|
||||
- Touch delay time : 500 uS
|
||||
- Panel driver setting time: 500 uS
|
||||
*/
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_TSC_CFG, 0x9A);
|
||||
|
||||
/* Configure the Touch FIFO threshold: single point reading */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_FIFO_TH, 0x01);
|
||||
|
||||
/* Clear the FIFO memory content. */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_FIFO_STA, 0x01);
|
||||
|
||||
/* Put the FIFO back into operation mode */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_FIFO_STA, 0x00);
|
||||
|
||||
/* Set the range and accuracy pf the pressure measurement (Z) :
|
||||
- Fractional part :7
|
||||
- Whole part :1
|
||||
*/
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_TSC_FRACT_XYZ, 0x01);
|
||||
|
||||
/* Set the driving capability (limit) of the device for TSC pins: 50mA */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_TSC_I_DRIVE, 0x01);
|
||||
|
||||
/* Touch screen control configuration (enable TSC):
|
||||
- No window tracking index
|
||||
- XYZ acquisition mode
|
||||
*/
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_TSC_CTRL, 0x01);
|
||||
|
||||
/* Clear all the status pending bits if any */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_INT_STA, 0xFF);
|
||||
|
||||
/* Wait for 2 ms delay */
|
||||
IOE_Delay(2);
|
||||
}
|
||||
|
||||
void touch_power_on(void) {
|
||||
// turn on CTP circuitry
|
||||
touch_active_pin_state();
|
||||
HAL_Delay(50);
|
||||
}
|
||||
|
||||
void touch_power_off(void) {
|
||||
// turn off CTP circuitry
|
||||
HAL_Delay(50);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reset the stmpe811 by Software.
|
||||
* @param DeviceAddr: Device address on communication Bus.
|
||||
* @retval None
|
||||
*/
|
||||
void stmpe811_Reset() {
|
||||
/* Power Down the stmpe811 */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_SYS_CTRL1, 2);
|
||||
|
||||
/* Wait for a delay to ensure registers erasing */
|
||||
IOE_Delay(10);
|
||||
|
||||
/* Power On the Codec after the power off => all registers are reinitialized
|
||||
*/
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_SYS_CTRL1, 0);
|
||||
|
||||
/* Wait for a delay to ensure registers erasing */
|
||||
IOE_Delay(2);
|
||||
}
|
||||
|
||||
void touch_init(void) {
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
|
||||
// PC4 capacitive touch panel module (CTPM) interrupt (INT) input
|
||||
GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING;
|
||||
GPIO_InitStructure.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStructure.Pin = GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
__HAL_GPIO_EXTI_CLEAR_FLAG(GPIO_PIN_15);
|
||||
|
||||
stmpe811_Reset();
|
||||
touch_set_mode();
|
||||
touch_sensitivity(0x06);
|
||||
}
|
||||
|
||||
void touch_sensitivity(uint8_t value) {
|
||||
// set panel threshold (TH_GROUP) - default value is 0x12
|
||||
// uint8_t touch_panel_threshold[] = {0x80, value};
|
||||
// ensure(sectrue *
|
||||
// (HAL_OK == HAL_I2C_Master_Transmit(
|
||||
// &I2c_handle, TOUCH_ADDRESS, touch_panel_threshold,
|
||||
// sizeof(touch_panel_threshold), 10)),
|
||||
// NULL);
|
||||
}
|
||||
|
||||
uint32_t touch_is_detected(void) {
|
||||
uint8_t state = ((IOE_Read(TS_I2C_ADDRESS, STMPE811_REG_TSC_CTRL) &
|
||||
(uint8_t)STMPE811_TS_CTRL_STATUS) == (uint8_t)0x80);
|
||||
return state > 0;
|
||||
}
|
||||
|
||||
uint32_t touch_active(void) {
|
||||
// check the interrupt line coming in from the CTPM.
|
||||
// the line make a short pulse, which sets an interrupt flag when new data is
|
||||
// available.
|
||||
// Reference section 1.2 of "Application Note for FT6x06 CTPM". we
|
||||
// configure the touch controller to use "interrupt trigger mode".
|
||||
|
||||
// uint32_t event = __HAL_GPIO_EXTI_GET_FLAG(GPIO_PIN_15);
|
||||
// if (event != 0) {
|
||||
// __HAL_GPIO_EXTI_CLEAR_FLAG(GPIO_PIN_15);
|
||||
// }
|
||||
|
||||
uint8_t state;
|
||||
uint8_t ret = 0;
|
||||
|
||||
state = ((IOE_Read(TS_I2C_ADDRESS, STMPE811_REG_TSC_CTRL) &
|
||||
(uint8_t)STMPE811_TS_CTRL_STATUS) == (uint8_t)0x80);
|
||||
|
||||
if (state > 0) {
|
||||
if (IOE_Read(TS_I2C_ADDRESS, STMPE811_REG_FIFO_SIZE) > 0) {
|
||||
ret = 1;
|
||||
}
|
||||
} else {
|
||||
/* Reset FIFO */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_FIFO_STA, 0x01);
|
||||
/* Enable the FIFO again */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_FIFO_STA, 0x00);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint32_t check_timeout(uint32_t prev, uint32_t timeout) {
|
||||
uint32_t current = hal_ticks_ms();
|
||||
uint32_t diff = current - prev;
|
||||
|
||||
if (diff >= timeout) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the touch screen X and Y positions values
|
||||
* @param DeviceAddr: Device address on communication Bus.
|
||||
* @param X: Pointer to X position value
|
||||
* @param Y: Pointer to Y position value
|
||||
* @retval None.
|
||||
*/
|
||||
void stmpe811_TS_GetXY(uint16_t *X, uint16_t *Y) {
|
||||
uint8_t dataXYZ[4];
|
||||
uint32_t uldataXYZ;
|
||||
|
||||
IOE_ReadMultiple(TS_I2C_ADDRESS, STMPE811_REG_TSC_DATA_NON_INC, dataXYZ,
|
||||
sizeof(dataXYZ));
|
||||
|
||||
/* Calculate positions values */
|
||||
uldataXYZ = (dataXYZ[0] << 24) | (dataXYZ[1] << 16) | (dataXYZ[2] << 8) |
|
||||
(dataXYZ[3] << 0);
|
||||
*X = (uldataXYZ >> 20) & 0x00000FFF;
|
||||
*Y = (uldataXYZ >> 8) & 0x00000FFF;
|
||||
|
||||
/* Reset FIFO */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_FIFO_STA, 0x01);
|
||||
/* Enable the FIFO again */
|
||||
IOE_Write(TS_I2C_ADDRESS, STMPE811_REG_FIFO_STA, 0x00);
|
||||
}
|
||||
|
||||
typedef struct {
|
||||
uint16_t TouchDetected;
|
||||
uint16_t X;
|
||||
uint16_t Y;
|
||||
uint16_t Z;
|
||||
} TS_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief Returns status and positions of the touch screen.
|
||||
* @param TsState: Pointer to touch screen current state structure
|
||||
*/
|
||||
void BSP_TS_GetState(TS_StateTypeDef *TsState) {
|
||||
static uint32_t _x = 0, _y = 0;
|
||||
uint16_t xDiff, yDiff, x, y, xr, yr;
|
||||
|
||||
TsState->TouchDetected = touch_active();
|
||||
|
||||
if (TsState->TouchDetected) {
|
||||
stmpe811_TS_GetXY(&x, &y);
|
||||
|
||||
/* Y value first correction */
|
||||
y -= 360;
|
||||
|
||||
/* Y value second correction */
|
||||
yr = y / 11;
|
||||
|
||||
/* Return y position value */
|
||||
if (yr <= 0) {
|
||||
yr = 0;
|
||||
} else if (yr > 320) {
|
||||
yr = 320 - 1;
|
||||
} else {
|
||||
yr = 320 - yr;
|
||||
}
|
||||
y = yr;
|
||||
|
||||
/* X value first correction */
|
||||
if (x <= 3000) {
|
||||
x = 3870 - x;
|
||||
} else {
|
||||
x = 3800 - x;
|
||||
}
|
||||
|
||||
/* X value second correction */
|
||||
xr = x / 15;
|
||||
|
||||
/* Return X position value */
|
||||
if (xr <= 0) {
|
||||
xr = 0;
|
||||
} else if (xr > 240) {
|
||||
xr = 240 - 1;
|
||||
} else {
|
||||
}
|
||||
|
||||
x = xr;
|
||||
xDiff = x > _x ? (x - _x) : (_x - x);
|
||||
yDiff = y > _y ? (y - _y) : (_y - y);
|
||||
|
||||
if (xDiff + yDiff > 5) {
|
||||
_x = x;
|
||||
_y = y;
|
||||
}
|
||||
|
||||
/* Update the X position */
|
||||
TsState->X = _x;
|
||||
|
||||
/* Update the Y position */
|
||||
TsState->Y = _y;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t touch_read(void) {
|
||||
TS_StateTypeDef state = {0};
|
||||
static uint32_t xy = 0;
|
||||
static TS_StateTypeDef state_last = {0};
|
||||
// static uint16_t first = 1;
|
||||
static uint16_t touching = 0;
|
||||
|
||||
if (!touch_is_detected()) {
|
||||
if (touching) {
|
||||
// touch end
|
||||
memcpy(&state_last, &state, sizeof(state));
|
||||
touching = 0;
|
||||
return TOUCH_END | xy;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
BSP_TS_GetState(&state);
|
||||
|
||||
if (state.TouchDetected == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// if (first != 0) {
|
||||
// memcpy(&state_last, &state, sizeof(state));
|
||||
// first = 0;
|
||||
// return 0;
|
||||
// }
|
||||
|
||||
if ((state.TouchDetected == 0 && state_last.TouchDetected == 0) ||
|
||||
memcmp(&state, &state_last, sizeof(state)) == 0) {
|
||||
// no change detected
|
||||
return 0;
|
||||
}
|
||||
|
||||
xy = touch_pack_xy(state.X, state.Y);
|
||||
|
||||
if (state.TouchDetected && !state_last.TouchDetected) {
|
||||
// touch start
|
||||
memcpy(&state_last, &state, sizeof(state));
|
||||
touching = 1;
|
||||
return TOUCH_START | xy;
|
||||
} else if (!state.TouchDetected && state_last.TouchDetected) {
|
||||
// touch end
|
||||
memcpy(&state_last, &state, sizeof(state));
|
||||
touching = 0;
|
||||
return TOUCH_END | xy;
|
||||
} else {
|
||||
// touch move
|
||||
memcpy(&state_last, &state, sizeof(state));
|
||||
return TOUCH_MOVE | xy;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -0,0 +1,6 @@
|
||||
|
||||
|
||||
#ifndef _STMPE811_H
|
||||
#define _STMPE811_H
|
||||
|
||||
#endif //_STMPE811_H
|
||||
@ -0,0 +1,19 @@
|
||||
{
|
||||
"header_len": 4608,
|
||||
"text": "UNSAFE, DO NOT USE!",
|
||||
"hw_model": "D001",
|
||||
"expiry": 0,
|
||||
"version": [0, 1],
|
||||
"sig_m": 2,
|
||||
"trust": {
|
||||
"show_vendor_string": true,
|
||||
"require_user_click": true,
|
||||
"red_background": true,
|
||||
"delay": 1
|
||||
},
|
||||
"pubkeys": [
|
||||
"e28a8970753332bd72fef413e6b0b2ef1b4aadda7aa2c141f233712a6876b351",
|
||||
"d4eec1869fb1b8a4e817516ad5a931557cb56805c3eb16e8f3a803d647df7869",
|
||||
"772c8a442b7db06e166cfbc1ccbcbcde6f3eba76a4e98ef3ffc519502237d6ef"
|
||||
]
|
||||
}
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -0,0 +1,31 @@
|
||||
from . import get_hw_model_as_number
|
||||
|
||||
|
||||
def configure(env, features_wanted, defines, sources):
|
||||
features_available = []
|
||||
board = "stm32f429i-disc1.h"
|
||||
display = "ltdc.c"
|
||||
hw_model = get_hw_model_as_number("D001")
|
||||
hw_revision = 0
|
||||
|
||||
defines += [f'TREZOR_BOARD=\\"boards/{board}\\"']
|
||||
defines += [f"HW_MODEL={hw_model}"]
|
||||
defines += [f"HW_REVISION={hw_revision}"]
|
||||
sources += [f"embed/trezorhal/displays/{display}"]
|
||||
sources += ["embed/trezorhal/displays/ili9341_spi.c"]
|
||||
sources += ["embed/trezorhal/sdram.c"]
|
||||
|
||||
if "input" in features_wanted:
|
||||
sources += ["embed/trezorhal/i2c.c"]
|
||||
sources += ["embed/trezorhal/touch/touch.c"]
|
||||
sources += ["embed/trezorhal/touch/stmpe811.c"]
|
||||
features_available.append("touch")
|
||||
|
||||
if "dma2d" in features_wanted:
|
||||
defines += ["USE_DMA2D"]
|
||||
sources += ["embed/lib/dma2d_emul.c"]
|
||||
features_available.append("dma2d")
|
||||
|
||||
env.get("ENV")["TREZOR_BOARD"] = board
|
||||
|
||||
return features_available
|
||||
@ -1,6 +1,6 @@
|
||||
from trezor import utils
|
||||
|
||||
if utils.MODEL in ("T",):
|
||||
if utils.MODEL in ("T", "DISC1"):
|
||||
from .tt_v2.fido import * # noqa: F401,F403
|
||||
elif utils.MODEL in ("R",):
|
||||
from .tr.fido import * # noqa: F401,F403
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
from trezor import utils
|
||||
|
||||
if utils.MODEL in ("T",):
|
||||
if utils.MODEL in ("T", "DISC1"):
|
||||
from .tt_v2.homescreen import * # noqa: F401,F403
|
||||
elif utils.MODEL in ("R",):
|
||||
from .tr.homescreen import * # noqa: F401,F403
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
from trezor import utils
|
||||
|
||||
if utils.MODEL in ("T",):
|
||||
if utils.MODEL in ("T", "DISC1"):
|
||||
from .tt_v2.progress import * # noqa: F401,F403
|
||||
elif utils.MODEL in ("R",):
|
||||
from .tr.progress import * # noqa: F401,F403
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
from trezor import utils
|
||||
|
||||
if utils.MODEL in ("T",):
|
||||
if utils.MODEL in ("T", "DISC1"):
|
||||
from .tt_v2.recovery import * # noqa: F401,F403
|
||||
elif utils.MODEL in ("R",):
|
||||
from .tr.recovery import * # noqa: F401,F403
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
from trezor import utils
|
||||
|
||||
if utils.MODEL in ("T",):
|
||||
if utils.MODEL in ("T", "DISC1"):
|
||||
from .tt_v2.reset import * # noqa: F401,F403
|
||||
elif utils.MODEL in ("R",):
|
||||
from .tr.reset import * # noqa: F401,F403
|
||||
|
||||
@ -0,0 +1,26 @@
|
||||
# Trezor firmware on STM32F429I-DISC1
|
||||
|
||||
The
|
||||
[STM32F429I-DISC1](https://www.st.com/en/evaluation-tools/32f429idiscovery.html)
|
||||
evaluation board has similar MCU to Trezor Model T as well as compatible touchscreen.
|
||||
|
||||
On the board, mini-USB is used to flash the firmware using the integrated ST-Link, as well
|
||||
as power the board. The micro-USB connector is used by the firmware to communicate with
|
||||
the trezor client. I.e. normally you need both cables connected.
|
||||
|
||||
Make sure JP1, JP2, JP3, and CN4 are fitted with jumpers (board is in this state by
|
||||
default).
|
||||
|
||||
## Building and flashing
|
||||
|
||||
Follow the [normal build instructions](../build/embedded.md) however pass
|
||||
`TREZOR_MODEL=DISC1` to `make`:
|
||||
|
||||
```
|
||||
# build firmware images
|
||||
make build_boardloader build_bootloader build_firmware TREZOR_MODEL=DISC1
|
||||
# use openocd to flash everything through st-link
|
||||
make flash
|
||||
```
|
||||
|
||||
Reset board after command finishes.
|
||||
@ -0,0 +1 @@
|
||||
Added support for STM32F429I-DISC1 board
|
||||
Loading…
Reference in new issue