1
0
mirror of https://github.com/trezor/trezor-firmware.git synced 2024-12-24 15:28:10 +00:00
Commit Graph

22 Commits

Author SHA1 Message Date
cepetr
bba94ab1f6 refactor(core): remove redundant TREZOR_FONT_BPP
[no changelog]
2024-11-04 14:05:37 +01:00
cepetr
cb2c85dc2e refactor(core): remove unused MAX_DISPLAY_RESx
[no changelog]
2024-11-04 14:05:37 +01:00
tychovrahe
42396dd007 refactor(core): make USE_xxx defines global
[no changelog]
2024-10-31 10:27:08 +01:00
cepetr
059152d9b4 fix(core): fix BHK_MAXSIZE constant
[no changelog]
2024-10-31 10:25:31 +01:00
cepetr
7bd3663930 fix(core): align coreapp start to 8KB (u5 only)
[no changelog]
2024-10-31 10:25:31 +01:00
cepetr
5fd1f0e4c6 refactor(core): decompose lowlevel module
[no changelog]
2024-10-22 09:06:21 +02:00
tychovrahe
d412ce987e refactor(core): use common layout.c file
[no changelog]
2024-09-27 09:49:20 +02:00
tychovrahe
21c1359ac6 refactor(core): streamline layout definitions
[no changelog]
2024-09-27 09:49:20 +02:00
tychovrahe
e9c025751c fix(core): fix storage offsets
[no changelog]
2024-09-24 12:21:53 +02:00
tychovrahe
28f420189a refactor(core): combined build of coreapp + kernel, linker scripts refactoring
[no changelog]
2024-09-24 12:21:53 +02:00
cepetr
7f3cff04f1 refactor(core/embed): introduce new mpu driver
[no changelog]
2024-09-24 12:21:53 +02:00
cepetr
91649dc7cb feat(core/embed): introduce non-blocking i2c drivers
[no changelog]
2024-09-24 12:21:53 +02:00
Martin Milata
5d8461969a chore(core): add hashes for 2.1.8 bootloader 2024-09-09 14:21:38 +02:00
Martin Milata
37006592db chore(core): add signed bootloader 2.1.8 for T3B1 and T3T1 2024-09-09 12:12:39 +02:00
tychovrahe
708b0274f5 chore(core): bump monotonic versions
[no changelog]
2024-09-03 13:07:34 +02:00
tychovrahe
395a4af9be refactor(core): extract monotonic version to model specific headers
[no changelog]
2024-09-03 13:07:34 +02:00
tychovrahe
7275a5544e refactor(core): move embedded bootloaders and their hashes to model folders
[no changelog]
2024-08-29 12:47:24 +02:00
tychovrahe
4397978563 chore(core): add T3B1 binaries
[no changelog]
2024-08-01 13:29:38 +02:00
tychovrahe
354dad617d fix(core): fix vector table alignment on STM32U5
[no changelog]
2024-07-16 16:38:48 +02:00
tychovrahe
7c94080227 refactor(core): move vendor headers to model specific directories
[no changelog]
2024-07-16 15:56:28 +02:00
tychovrahe
11b1d5ca41 chore(core): add T3B1 production keys
[no changelog]
2024-07-16 15:56:28 +02:00
tychovrahe
78b4017859 feat(core): add support for T3B1 2024-07-16 15:56:28 +02:00