tychovrahe
|
5894c34f58
|
feat(core): adjust flash layout on DISC2
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
0d3af6a96a
|
fix(core): fix firmware hashing on U5
[no changelog]
|
2024-11-12 12:55:36 +01:00 |
|
tychovrahe
|
435fbd6e8c
|
feat(core): add power button to button driver
[no changelog]
|
2024-11-07 08:48:21 +01:00 |
|
cepetr
|
7b6f444751
|
refactor(core): introduce global trezor_rtl/bsp/model headers
[no changelog]
|
2024-11-05 10:00:31 +01:00 |
|
cepetr
|
c997201754
|
refactor(core): simplify ensure_compatible_settings
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
80a67c647f
|
refactor(core): relocate display resolution to model.h
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
bba94ab1f6
|
refactor(core): remove redundant TREZOR_FONT_BPP
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
cb2c85dc2e
|
refactor(core): remove unused MAX_DISPLAY_RESx
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
tychovrahe
|
d38c2e1790
|
chore(core): drop obsolete boards
[no changelog]
|
2024-10-31 10:27:08 +01:00 |
|
tychovrahe
|
42396dd007
|
refactor(core): make USE_xxx defines global
[no changelog]
|
2024-10-31 10:27:08 +01:00 |
|
cepetr
|
a747210f54
|
fix(core): fix secret & assets start address const
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
059152d9b4
|
fix(core): fix BHK_MAXSIZE constant
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
7bd3663930
|
fix(core): align coreapp start to 8KB (u5 only)
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
5fd1f0e4c6
|
refactor(core): decompose lowlevel module
[no changelog]
|
2024-10-22 09:06:21 +02:00 |
|
cepetr
|
f6647ab3b7
|
refactor(core): introduce startup_init.c
[no changelog]
|
2024-10-22 09:06:21 +02:00 |
|
tychovrahe
|
d71d9e9c34
|
feat(core): add T3W1 emulator build
[no changelog]
|
2024-10-09 15:06:40 +02:00 |
|
tychovrahe
|
915d4fca94
|
feat(core): add support for T3W1, on F4
[no changelog]
|
2024-10-09 15:06:40 +02:00 |
|
tychovrahe
|
138fadbf7b
|
feat(core): add LHS200KB display panel
[no changelog]
|
2024-10-09 15:06:40 +02:00 |
|
tychovrahe
|
d312944f1e
|
feat(core): embed bootloaders to DISC1,2 models in order to support testing related featurees
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
d412ce987e
|
refactor(core): use common layout.c file
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
21c1359ac6
|
refactor(core): streamline layout definitions
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
e13d4a45a6
|
chore(core): remove residual support for T1B1 in core
[no changelog]
|
2024-09-25 09:18:01 +02:00 |
|
tychovrahe
|
e9c025751c
|
fix(core): fix storage offsets
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
tychovrahe
|
28f420189a
|
refactor(core): combined build of coreapp + kernel, linker scripts refactoring
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
1c991339ce
|
refactor(core/embed): split firmware into kernel & coreapp
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
7f3cff04f1
|
refactor(core/embed): introduce new mpu driver
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
91649dc7cb
|
feat(core/embed): introduce non-blocking i2c drivers
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
33c2bcbe52
|
refactor(core/embed): simplify ensure_compatible_settings
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
Martin Milata
|
5d8461969a
|
chore(core): add hashes for 2.1.8 bootloader
|
2024-09-09 14:21:38 +02:00 |
|
Martin Milata
|
37006592db
|
chore(core): add signed bootloader 2.1.8 for T3B1 and T3T1
|
2024-09-09 12:12:39 +02:00 |
|
tychovrahe
|
708b0274f5
|
chore(core): bump monotonic versions
[no changelog]
|
2024-09-03 13:07:34 +02:00 |
|
tychovrahe
|
395a4af9be
|
refactor(core): extract monotonic version to model specific headers
[no changelog]
|
2024-09-03 13:07:34 +02:00 |
|
tychovrahe
|
c1864a2a91
|
refactor(core): enclose monotonic counter to platform specific module
[no changelog]
|
2024-09-03 13:07:34 +02:00 |
|
tychovrahe
|
7275a5544e
|
refactor(core): move embedded bootloaders and their hashes to model folders
[no changelog]
|
2024-08-29 12:47:24 +02:00 |
|
tychovrahe
|
4397978563
|
chore(core): add T3B1 binaries
[no changelog]
|
2024-08-01 13:29:38 +02:00 |
|
tychovrahe
|
1212a7319a
|
fix(core): T3T1: adjust touch coordinates
|
2024-07-25 12:37:21 +03:00 |
|
tychovrahe
|
354dad617d
|
fix(core): fix vector table alignment on STM32U5
[no changelog]
|
2024-07-16 16:38:48 +02:00 |
|
tychovrahe
|
7c94080227
|
refactor(core): move vendor headers to model specific directories
[no changelog]
|
2024-07-16 15:56:28 +02:00 |
|
tychovrahe
|
11b1d5ca41
|
chore(core): add T3B1 production keys
[no changelog]
|
2024-07-16 15:56:28 +02:00 |
|
tychovrahe
|
78b4017859
|
feat(core): add support for T3B1
|
2024-07-16 15:56:28 +02:00 |
|
tychovrahe
|
e3b9548506
|
chore(core): add TS5 background image for emulator
[no changelog]
|
2024-07-12 15:38:33 +02:00 |
|
tychovrahe
|
9166dc330e
|
refactor(core): reorganize model-specific files in embed/models
[no changelog]
|
2024-05-21 19:01:31 +02:00 |
|
tychovrahe
|
6b31b8eec3
|
chore(core): change USB manufacturer and product strings for new models
[no changelog]
|
2024-05-06 13:10:36 +02:00 |
|
matejcik
|
867300b8c6
|
chore(core): include T3T1 boardloader / bootloader production keys
|
2024-04-12 16:13:52 +02:00 |
|
tychovrahe
|
1600759457
|
refactor(core): simplify secret.h api, hide platform differences
[no changelog]
|
2024-04-11 16:13:58 +02:00 |
|
tychovrahe
|
ffccf849eb
|
chore(core): fill T3T1 model full name
[no changelog]
|
2024-04-04 12:46:44 +02:00 |
|
cepetr
|
1e3e7f808b
|
fix(core): fix build on disc2 model
|
2024-03-27 10:44:56 +01:00 |
|
tychovrahe
|
1909d1ebdb
|
feat(core): improve flexibility of combine script, add combine fw make targets
[no changelog]
|
2024-03-13 22:12:57 +01:00 |
|
tychovrahe
|
b62dc27f06
|
feat(core): add translations support for U5 models
[no changelog]
|
2024-02-29 23:05:56 +01:00 |
|
tychovrahe
|
c3f84e2949
|
perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256
[no changelog]
|
2024-02-29 23:05:56 +01:00 |
|