Commit Graph

22 Commits (535a052df495e8ad74a0276036a4f24f15bbad89)

Author SHA1 Message Date
tychovrahe ffccf849eb chore(core): fill T3T1 model full name
6 months ago
cepetr 1e3e7f808b fix(core): fix build on disc2 model
6 months ago
tychovrahe 1909d1ebdb feat(core): improve flexibility of combine script, add combine fw make targets
6 months ago
tychovrahe b62dc27f06 feat(core): add translations support for U5 models
7 months ago
tychovrahe c3f84e2949 perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256
7 months ago
tychovrahe a71a608ea7 feat(core): add basic support for T3T1
7 months ago
tychovrahe 8815e764d2 feat(core): add support for STM32U585
7 months ago
cepetr 4cf781abb2 chore(core, legacy, storage): refactor flash drivers
7 months ago
tychovrahe 353095ae95 feat(core): add support for STM32U5A9J-DK board
7 months ago
tychovrahe 8150636a81 feat(core): add basic support for STM32U5
7 months ago
grdddj b8ea21d24a feat(all): implement translations into Trezor
7 months ago
tychovrahe 8a4f376f20 refactor(core): prepare fw for differently sized fw chunks
11 months ago
Martin Milata 040f6c2c8e Merge branch 'master' into release/23.09
12 months ago
matejcik c892d4b0ba refactor(core): inject full model name from build script
12 months ago
Martin Milata 07027a69e9 Merge branch 'master' into release/23.09
1 year ago
tychovrahe bd0b0b2d15 refactor(core): move model specific norcow config to model header
1 year ago
tychovrahe c9a657b074 feat(core): set final name for Safe 3
1 year ago
tychovrahe 5a86add884 refactor(core): differentiate models by internal name in python
1 year ago
tychovrahe e8281385f6 feat(core): implement secret handling in bootloader
1 year ago
tychovrahe 238e3fd7c1 refactor(core): add abstraction over flash memory layout
1 year ago
tychovrahe d3284baf21 feat(core): support STM32F429 discovery board
1 year ago
tychovrahe a2f8cb9d1c feat(core): add internal model field to features
1 year ago