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mirror of https://github.com/trezor/trezor-firmware.git synced 2024-11-19 05:58:09 +00:00
Commit Graph

391 Commits

Author SHA1 Message Date
tychovrahe
1f572fa14b feat(core): support 32MHz HSE on stm32 u5
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
cd06b5f600 chore(core): add storage flash area size checks
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
5c101ab800 feat(core): switch DISC2 to use newer U5G variant
[no changelog]
2024-11-14 09:30:20 +01:00
tychovrahe
4ed70cc9bc chore(core): remove useless MPU_MODE_KERNEL_SRAM
[no changelog]
2024-11-14 09:30:07 +01:00
tychovrahe
c50dd96783 fix(core): fix MPU configuration on F4 - kernel SRAM
[no changelog]
2024-11-13 21:02:21 +01:00
cepetr
c11dc5dcd3 refactor(core): rename xframebuffer to framebuffer
[no changelog]
2024-11-13 12:15:38 +01:00
cepetr
d4286ff584 chore(core): remove legacy drawing code (c)
[no changelog]
2024-11-13 12:15:38 +01:00
tychovrahe
0d3af6a96a fix(core): fix firmware hashing on U5
[no changelog]
2024-11-12 12:55:36 +01:00
cepetr
79cf4959d3 refactor(core): improve button driver (add interrupt support)
[no changelog]
2024-11-07 08:48:21 +01:00
tychovrahe
435fbd6e8c feat(core): add power button to button driver
[no changelog]
2024-11-07 08:48:21 +01:00
cepetr
29e03bd873 fix(core): fix haptic custom effect in loaders
[no changelog]
2024-11-05 21:04:32 +01:00
cepetr
7b6f444751 refactor(core): introduce global trezor_rtl/bsp/model headers
[no changelog]
2024-11-05 10:00:31 +01:00
tychovrahe
33fc7fb2e6 fix(core): fix OTP write access 2024-11-04 18:33:03 +01:00
cepetr
c997201754 refactor(core): simplify ensure_compatible_settings
[no changelog]
2024-11-04 14:05:37 +01:00
cepetr
80a67c647f refactor(core): relocate display resolution to model.h
[no changelog]
2024-11-04 14:05:37 +01:00
cepetr
bba94ab1f6 refactor(core): remove redundant TREZOR_FONT_BPP
[no changelog]
2024-11-04 14:05:37 +01:00
cepetr
cb2c85dc2e refactor(core): remove unused MAX_DISPLAY_RESx
[no changelog]
2024-11-04 14:05:37 +01:00
cepetr
387d98d6e4 refactor(core): get rid of STM32U5 in platform indep code
[no changelog]
2024-11-04 14:05:37 +01:00
tychovrahe
42396dd007 refactor(core): make USE_xxx defines global
[no changelog]
2024-10-31 10:27:08 +01:00
cepetr
9e28e96639 refactor(core): simplify and improve flash layout definitions
[no changelog]
2024-10-31 10:25:31 +01:00
cepetr
4af600d422 refactor(core): introduce USE_TRUSTZONE
[no changelog]
2024-10-31 10:25:31 +01:00
cepetr
b174237684 feat(core): properly utilize trustzone in kernel and core app
[no changelog]
2024-10-31 10:25:31 +01:00
cepetr
133135e204 fix(core): fix frame buffer size on disc2
[no changelog]
2024-10-31 10:25:31 +01:00
cepetr
69dcb84d4e fix(core): fix sram_u region clearing
[no changelog]
2024-10-31 10:25:31 +01:00
cepetr
7bd3663930 fix(core): align coreapp start to 8KB (u5 only)
[no changelog]
2024-10-31 10:25:31 +01:00
tychovrahe
9f52918d27 feat(core): support 32 bit colors in emulator
[no changelog]
2024-10-23 14:42:13 +02:00
tychovrahe
80fcaa369f feat(core/prodtest): added TOUCH_POWER command to prodtest 2024-10-23 14:42:00 +02:00
Martin Milata
87aab69644 fix(core): memory corruption on emulator init
Found by AddressSanitizer.
2024-10-22 23:33:44 +02:00
cepetr
3a19609035 fix(core): correct swapped F4/U5 reset flags
[no changelog]
2024-10-22 23:03:15 +02:00
cepetr
a1ab50017d feat(core): record interrupts with systemview
[no changelog]
2024-10-22 10:22:50 +02:00
cepetr
2589d48c8b fix(core): fix & upgrade systemview target code
[no changelog]
2024-10-22 10:22:50 +02:00
cepetr
76891323f6 feat(core): added access control for framebuffer
[no changelog]
2024-10-22 09:40:13 +02:00
cepetr
0fa2cf70cd refactor(core): get rid of platform.h
[no changelog]
2024-10-22 09:06:21 +02:00
cepetr
5fd1f0e4c6 refactor(core): decompose lowlevel module
[no changelog]
2024-10-22 09:06:21 +02:00
cepetr
f6647ab3b7 refactor(core): introduce startup_init.c
[no changelog]
2024-10-22 09:06:21 +02:00
cepetr
bfa3ea4e5e refactor(core): remove common.c on all platforms
[no changelog]
2024-10-22 09:06:21 +02:00
cepetr
12a9dca5e1 refactor(emulator): improve SDL event polling logic
[no changelog]
2024-10-22 09:06:21 +02:00
cepetr
d062a54929 refactor(core): fix platform header includes
[no changelog]
2024-10-22 09:06:21 +02:00
cepetr
7670958fc5 refactor(core): remove set_core_clock from emulator
[no changelog]
2024-10-22 09:06:21 +02:00
cepetr
5845c665af refactor(core): refactor unit properties detection
[no changelog]
2024-10-22 08:30:49 +02:00
cepetr
d80e8c26f5 fix(core): fix memory layout on u5
[no changelog]
2024-10-22 08:30:49 +02:00
cepetr
976867d7d8 fix(core): add missing optiga_sign syscall
[no changelog]
2024-10-22 07:41:30 +02:00
cepetr
63f5f72804 feat(core): implement syscall verifiers
[no changelog]
2024-10-22 07:41:30 +02:00
cepetr
93af056c13 refactor(core): adjust system api for syscall verifier
[no changelog]
2024-10-22 07:41:30 +02:00
cepetr
be59a09a4c refactor(core): remove hash_processor syscalls
[no changelog]
2024-10-22 07:41:30 +02:00
cepetr
0312158aa1 refactor(core): adjust display api for syscall verifier
[no changelog]
2024-10-22 07:41:30 +02:00
cepetr
305f16c86b refactor(core): unify arg parsing in syscall dispatch
[no changelog]
2024-10-22 07:41:30 +02:00
Roman Zeyde
da7ddd5c8c chore(core/embed): fixup sha256 context type name
[no changelog]
2024-10-21 09:42:20 +02:00
tychovrahe
d71d9e9c34 feat(core): add T3W1 emulator build
[no changelog]
2024-10-09 15:06:40 +02:00
tychovrahe
138fadbf7b feat(core): add LHS200KB display panel
[no changelog]
2024-10-09 15:06:40 +02:00