arno/trezor-firmware
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Code Issues Releases Wiki Activity
13,977 Commits 356 Branches 205 Tags 222 MiB
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Commit Graph

140 Commits

Author SHA1 Message Date
Andrew Kozlik
74759310bb feat(core): Integrate OPTIGA Trust M 
[no changelog]
 2023-08-02 00:35:43 +02:00
tychovrahe
238e3fd7c1 refactor(core): add abstraction over flash memory layout 
[no changelog]
 2023-07-25 10:25:20 +02:00
Martin Milata
4a6420c5dd style(core): discovery.py 
[no changelog]
 2023-07-18 13:22:45 +02:00
Martin Milata
f9a1592162 build(core): fix DISC1 boardloader build 
[no changelog]
 2023-07-18 12:01:42 +02:00
grdddj
db9f76df0d chore(style): apply pylint suggestion on site_scons python files 
[no changelog]
 2023-07-18 10:10:41 +02:00
grdddj
44ff6d42b3 chore(style): apply flake8 findings on site_scons python files 
[no changelog]
 2023-07-18 10:10:41 +02:00
grdddj
7df3219a7a chore(style): apply black and isort style lints for site_scons python files 
[no changelog]
 2023-07-18 10:10:41 +02:00
tychovrahe
eca1fc381b refactor(core): rust bindgen mcu-type related arguments are taken from board definition 
[no changelog]
 2023-07-07 22:09:56 +02:00
tychovrahe
ebbd7f9d35 refactor(core): restructure trezorhal, prepare to support more platforms 
[no changelog]
 2023-07-07 22:09:56 +02:00
tychovrahe
671f23f1aa feat(core): support rev 10 of T2B1 HW 
[no changelog]
 2023-06-27 22:45:33 +02:00
tychovrahe
539420cac8 refactor(core): make backlight/fading optional 
[no changelog]
 2023-06-27 16:18:30 +02:00
tychovrahe
1f1680243f refactor(core): separate backlight pwm driver and display driver 
[no changelog]
 2023-06-27 16:18:30 +02:00
tychovrahe
da4ce32b45 fix(core): fix gamma correction for Model T 2023-06-20 10:58:09 +02:00
grdddj
f481590bb7 fix(core): support python3.8 for SConscript helpers 
[no changelog]
 2023-06-19 17:30:00 +02:00
tychovrahe
d3284baf21 feat(core): support STM32F429 discovery board 2023-06-15 17:08:14 +02:00
tychovrahe
8154e5103f refactor(core): make emulated dma2d usable outside of emulator 
[no changelog]
 2023-06-15 17:08:14 +02:00
grdddj
d031be83e6 chore(core): type and format the site_scons python helpers 
[no changelog]
 2023-06-14 18:17:09 +02:00
tychovrahe
0c5db05357 feat(core): support 16bit i8080 display bus 
[no changelog]
 2023-04-27 12:36:12 +02:00
tychovrahe
09349c308a feat(core): support hw revision 6 of T2B1 
[no changelog]
 2023-04-26 14:15:00 +02:00
Martin Milata
3fb3f108cc chore(vendor): bump micropython to 1.19.1 
Relevant micropython commits:
  01374d941f9d7398e35990b574769b20c6779457 py/mpconfig.h: Define initial templates for "feature levels".
  7b89ad8dbf432ab51eea6d138e179bf51394c786 py/vm: Add a fast path for LOAD_ATTR on instance types.
  68219a295c75457c096ac42dbe8411b84e1e1a51 stm32: Enable LOAD_ATTR fast path, and map lookup caching on >M0.
  e0bf4611c3a8b23b3c52e6a7804aac341ac3a87d py: Only search frozen modules when '.frozen' is found in sys.path.
  f2040bfc7ee033e48acef9f289790f3b4e6b74e5 py: Rework bytecode and .mpy file format to be mostly static data.
  926b554dafffa1e9bd80aa12fea5c621221c9d79 extmod/moduos: Create general uos module to be used by all ports.
  2b409ef8a46015f8f3bd20bc44e644637dbe9bd3 unix/moduos: Convert module to use extmod version.
  47f634300c5572571816817f16836113c98814ae py: Change makemoduledefs process so it uses output of qstr extraction.
  0e7bfc88c6ac6b5d64240f91183a3cfe2ab67ade all: Use mp_obj_malloc everywhere it's applicable.
  2a6ba47110be88ff1e1f5abd1bd76c353447884c py/obj: Add static safety checks to mp_obj_is_type().
 2023-04-21 13:14:07 +02:00
tychovrahe
33fb590f44 refactor(core): decouple i2c driver and touch driver 
[no changelog]
 2023-04-19 21:36:51 +02:00
tychovrahe
83500487b8 refactor(core): improve conditional compilations based on model 
[no changelog]
 2023-04-19 21:36:51 +02:00
tychovrahe
6ea68baf34 refactor(core): move files out of extmod 
[no changelog]
 2023-04-19 21:36:51 +02:00
matejcik
e5ed9d3df4 build(core): improve path resolution in scons tools 
[no changelog]
 2023-04-05 16:36:29 +02:00
tychovrahe
ead61d1e90 refactor(core): improve flexibility of build, allow different touch panel driver, allow STM32F429 
[no changelog]
 2023-03-02 15:56:33 +01:00
tychovrahe
9748a56a55 chore(core): automatic generation of CMakeLists 
[no changelog]
 2023-02-02 11:32:37 +01:00
tychovrahe
5ef6c3975d build(core): differentiate build results for different models 
[no changelog]
 2023-01-20 19:47:12 +01:00
tychovrahe
4603b9ee74 build(core): embed bootloader according to trezor model 
[no changelog]
 2023-01-20 19:47:12 +01:00
tychovrahe
115f7daaaa feat(core): prevent installing and running of incompatible firmware, prevent bootloader downgrade 2023-01-12 15:38:36 +01:00
tychovrahe
0d733d8e22 feat(core): change display type for model R 
[no changelog]
 2022-11-24 11:37:52 +01:00
tychovrahe
223d1b20fb refactor(core): change fonts organization 2022-09-29 21:50:10 +02:00
matejcik
bda1fa9912 build(core): exclude all "from typing" imports from build 2022-01-07 21:41:17 +01:00
amadejpapez
85ba7c12ba style(all): use f-strings for formatting 
[no changelog]
 2021-10-13 11:53:17 +02:00
matejcik
266955ba65 refactor: rework pb2py generator 
This also includes the capability to build Rust protobuf blobs.
 2021-06-08 09:55:19 +02:00
Jan Pochyla
f526818603 core: remove qstr blacklist 
As its no longer needed. Mirrors micropython change a09fd0475.
 2020-01-07 20:52:43 +01:00
Pavol Rusnak
b79102008d
core: fix new Python SyntaxWarning (new in 3.8) 2019-10-18 17:59:37 +00:00
Pavol Rusnak
d393fc6e85
Revert "core: replace BITCOIN_ONLY with a constant only in src/trezor/utils.py" 
This reverts commit b9e7e93bcf.

Unfortunately this does not work, compiler cannot see it is a literal constant,
so it won't get optimized out, even when we use const(0). Also const(False)
is not supported at all.
 2019-09-25 12:05:13 +02:00
Pavol Rusnak
b9e7e93bcf
core: replace BITCOIN_ONLY with a constant only in src/trezor/utils.py 2019-09-22 15:07:04 +02:00
Pavol Rusnak
8a61ef4f6e
core: unroll the utils.BITCOIN_ONLY constant in mpy-cross 2019-08-23 13:52:14 +02:00
matejcik
e5670856a2 MONOREPO CREATE FROM trezor-core 2019-04-15 19:14:40 +02:00