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Andrei Vlad LUTAS
76d92e73c2
Multiple changes
- Add support for AVX512-FP16 instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
- Bug fix: zeroing with no masking is not supported, so return an error if we encounter such encodings
- Bug fix: ignore VEX/EVEX.W field outside 64 bit mode for some instructions
- Several other minor fixes and improvements
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3 years ago |
.. |
cpuid.dat
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Added support for Intel FRED and LKGS instructions.
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3 years ago |
flags.dat
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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4 years ago |
modes.dat
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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4 years ago |
prefixes.dat
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Initial commit.
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4 years ago |
table_0F.dat
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Updated SEAMCALL specs according to Intel® Trust Domain CPU Architectural Extensions 343754-002US May 2021.
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3 years ago |
table_0F_3A.dat
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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4 years ago |
table_0F_38.dat
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Added support for Intel Key Locker instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-key-locker-specification.html.
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4 years ago |
table_3dnow.dat
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Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37.
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3 years ago |
table_base.dat
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Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
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3 years ago |
table_evex1.dat
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Multiple changes
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3 years ago |
table_evex2.dat
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Multiple changes
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3 years ago |
table_evex3.dat
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Multiple changes
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3 years ago |
table_evex5.dat
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Multiple changes
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3 years ago |
table_evex6.dat
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Multiple changes
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3 years ago |
table_fpu.dat
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Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37.
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3 years ago |
table_vex1.dat
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Multiple changes
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3 years ago |
table_vex2.dat
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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4 years ago |
table_vex3.dat
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Multiple changes
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3 years ago |
table_xop.dat
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Fixed RET with immediate - the immediate is not sign-extended.
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4 years ago |