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mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-18 13:38:07 +00:00
bddisasm/isagenerator/instructions
Andrei Vlad LUTAS 76d92e73c2 Multiple changes
- Add support for AVX512-FP16 instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
- Bug fix: zeroing with no masking is not supported, so return an error if we encounter such encodings
- Bug fix: ignore VEX/EVEX.W field outside 64 bit mode for some instructions
- Several other minor fixes and improvements
2021-07-08 12:40:39 +03:00
..
cpuid.dat Added support for Intel FRED and LKGS instructions. 2021-03-15 14:05:44 +02:00
flags.dat Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
modes.dat Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
prefixes.dat Initial commit. 2020-07-21 11:19:18 +03:00
table_0F_3A.dat Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
table_0F_38.dat Added support for Intel Key Locker instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-key-locker-specification.html. 2020-09-16 11:56:05 +03:00
table_0F.dat Updated SEAMCALL specs according to Intel® Trust Domain CPU Architectural Extensions 343754-002US May 2021. 2021-05-31 13:34:52 +03:00
table_3dnow.dat Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37. 2021-01-11 11:10:04 +02:00
table_base.dat Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write. 2021-05-17 09:04:34 +03:00
table_evex1.dat Multiple changes 2021-07-08 12:40:39 +03:00
table_evex2.dat Multiple changes 2021-07-08 12:40:39 +03:00
table_evex3.dat Multiple changes 2021-07-08 12:40:39 +03:00
table_evex5.dat Multiple changes 2021-07-08 12:40:39 +03:00
table_evex6.dat Multiple changes 2021-07-08 12:40:39 +03:00
table_fpu.dat Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37. 2021-01-11 11:10:04 +02:00
table_vex1.dat Multiple changes 2021-07-08 12:40:39 +03:00
table_vex2.dat Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
table_vex3.dat Multiple changes 2021-07-08 12:40:39 +03:00
table_xop.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00