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mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-22 15:38:07 +00:00
Commit Graph

320 Commits

Author SHA1 Message Date
Andrei Vlad LUTAS
d11fe85599 Improved linear address computation in bdshemu. 2020-07-24 23:11:36 +03:00
Andrei Vlad LUTAS
6c248cc4c1 Handle Ignore ER bit in instruction attributes. 2020-07-23 18:05:19 +03:00
Andrei Vlad LUTAS
7ddf7e448a Apply address size override to gla computation. 2020-07-23 16:19:08 +03:00
Ionel-Cristinel ANICHITEI
087ffbcf95 disasmtool_lix: Add missing instructions to ins_class_to_str 2020-07-23 15:54:05 +03:00
Andrei Vlad LUTAS
cfb0f97897 Truncate the output of a relative addressing if 0x67 prefix is used. 2020-07-23 15:31:05 +03:00
Andrei Vlad LUTAS
752bc626c4 Fixed RET with immediate - the immediate is not sign-extended.
Fixed VEX decoding in 32 bit mode - vex.vvvv bit 3 is simply ignored.
Fixed several FMA instructions decoding (L/W flag should be ignored).
Print the 64 bit immediate value in disassembly, instead of the raw immediate (note that the operand always contains the sign-extended, full immediate).
XBEGIN always uses 32/64 bit RIP size (0x66 does not affect its size).
Decode WBINVD even if it's preceded by 0x66/0xF2 prefixes.
Several mnemonic fixes (FXSAVE64, FXRSTOR64, PUSHA/PUSHAD...).
Properly decode VPERMIL2* instructions.
Fixed SSE register decoding when it is encoded in immediate.
Decode SCATTER instructions even though they use the VSIB index as source.
Some disp8 fixes (t1s -> t1s8/t1s16).
SYSCALL/SYSRET are decoded and executed in 32 bit compat modem, even though SDM states they are invalid.
RDPID uses 32/64 bit reg size, never 16.
Various other minor tweaks & fixes.
Re-generated the test files, and added some more, new tests.
2020-07-23 14:08:01 +03:00
Andrei Vlad LUTAS
52ed638c13 Fixed some typos.
Added SECURITY.md file.
2020-07-22 21:47:25 +03:00
Anichitei Ionel-Cristinel
08f4b31b7d
Merge pull request #2 from andreaswimmer/patch-1
Fix typo "Lighetweight" in README.md
2020-07-22 19:25:59 +03:00
andreaswimmer
0b7c9a84fe
Fix typo "Lighetweight" in README.md 2020-07-22 18:10:28 +02:00
Andrei Vlad LUTAS
960e9eaeee disasmtool_lix dumper fix - dump cet_ss and cet_ibt. 2020-07-22 09:32:18 +03:00
Andrei Vlad LUTAS
94d7894fa5 Added the Shadow Stack Pointer operand to the SYSRET and SYSENTER instructions.
Regenrated CET test files, as the CPUID feature flag was split as per the last documentation into CET_SS and CET_IBT.
2020-07-22 09:15:29 +03:00
vlutas
3f385cc531
Merge pull request #1 from valkheim/fix-no-color
Fix disasmtool_lix no_color option
2020-07-22 08:55:10 +03:00
Andrei Vlad LUTAS
8392c97f97 Use the documented byte granularity for cache-line accesses.
Fixed CET CPUID feature flag - split into CET_SS and CET_IBT.
2020-07-22 00:47:46 +03:00
Charles Paulet
f936d0c020 Fix disasmtool_lix no_color option 2020-07-21 22:13:05 +02:00
Andrei Vlad LUTAS
9ff2543660 Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions.
Moved the CET test cases in dedicated folders.
Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses.
A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 22:29:59 +03:00
Andrei Vlad LUTAS
811c3d0f7c Fixed several issues with CET instructions specification - shadow stack and shadow stack pointer implicit operands were missing from SETSSBSY instruction, and flags access was missing from them. 2020-07-21 17:36:19 +03:00
Andrei Vlad LUTAS
efe359b506 Typo fixes in the instruction tables.
Added a reference to the git repo in the documentation.
2020-07-21 16:38:09 +03:00
Andrei Vlad LUTAS
1d8adaf668 Use the safe NdDecodeEx API instead of the NdDecode API in the public docs example. 2020-07-21 16:22:59 +03:00
Andrei Vlad LUTAS
698ba367a1 Initial commit. 2020-07-21 11:19:18 +03:00
Andrei Vlad LUTAS
6ce54a28d6 Added license & readme files. 2020-07-09 15:33:21 +03:00