tychovrahe c3f84e2949 perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256 ... [no changelog]		2024-02-29 23:05:56 +01:00
..
board-unix.h	feat(core): add basic support for T3T1	2024-02-29 23:05:56 +01:00
stm32f429i-disc1.h	chore(core): unify i2c instances numbering	2024-02-29 23:05:56 +01:00
stm32u5a9j-dk.h	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
trezor_1.h	refactor(core): add flexible HSE settings	2023-12-18 14:41:44 +01:00
trezor_r_v3.h	refactor(core): add flexible HSE settings	2023-12-18 14:41:44 +01:00
trezor_r_v4.h	refactor(core): add flexible HSE settings	2023-12-18 14:41:44 +01:00
trezor_r_v6.h	refactor(core): add flexible HSE settings	2023-12-18 14:41:44 +01:00
trezor_r_v10.h	feat(core): support optiga handling on U5	2024-02-29 23:05:56 +01:00
trezor_t3t1_v4.h	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
trezor_t.h	chore(core): unify i2c instances numbering	2024-02-29 23:05:56 +01:00