tychovrahe c3f84e2949 perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256 ... [no changelog]		2024-02-29 23:05:56 +01:00
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boardloader	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
bootloader	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
bootloader_ci	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
extmod
firmware	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
lib	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
models	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
prodtest	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
reflash	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
rust	feat(core): add haptic feedback	2024-02-29 23:05:56 +01:00
segger
trezorhal	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
unix
vendorheader	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00