tychovrahe c3f84e2949 perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256 ... [no changelog]		2024-02-29 23:05:56 +01:00
..
.changelog.d	feat(core): add basic support for STM32U5	2024-02-29 23:05:56 +01:00
.towncrier.template.md	docs(core+legacy): use towncrier for generating CHANGELOG.md	2021-07-21 14:27:20 +02:00
CHANGELOG.md	chore(core/embed/boardloader): generate changelog, set correct version	2023-09-06 11:28:34 +02:00
CHANGELOG.unreleased	docs(core+legacy): use towncrier for generating CHANGELOG.md	2021-07-21 14:27:20 +02:00
main.c	perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256	2024-02-29 23:05:56 +01:00
memory_stm32f4.ld	feat(core): add basic support for STM32U5	2024-02-29 23:05:56 +01:00
memory_stm32u5a.ld	chore(core): use cortex-m33 stack protection	2024-02-29 23:05:56 +01:00
memory_stm32u58.ld	feat(core): add support for STM32U585	2024-02-29 23:05:56 +01:00
startup_stm32f4.s	feat(core): add basic support for STM32U5	2024-02-29 23:05:56 +01:00
startup_stm32u5.s	chore(core): use cortex-m33 stack protection	2024-02-29 23:05:56 +01:00
towncrier.toml	docs(core+legacy): use towncrier for generating CHANGELOG.md	2021-07-21 14:27:20 +02:00
version.h	chore(core/embed/boardloader): bump version after release	2023-09-06 11:28:34 +02:00