cepetr
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7b6f444751
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refactor(core): introduce global trezor_rtl/bsp/model headers
[no changelog]
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2024-11-05 10:00:31 +01:00 |
|
cepetr
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7bd3663930
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fix(core): align coreapp start to 8KB (u5 only)
[no changelog]
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2024-10-31 10:25:31 +01:00 |
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tychovrahe
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28f420189a
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refactor(core): combined build of coreapp + kernel, linker scripts refactoring
[no changelog]
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2024-09-24 12:21:53 +02:00 |
|
tychovrahe
|
a265b0f176
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fix(core/bootloader): evaluate model before vendor header signature when installing firmware
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2024-08-20 12:22:35 +02:00 |
|
tychovrahe
|
354dad617d
|
fix(core): fix vector table alignment on STM32U5
[no changelog]
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2024-07-16 16:38:48 +02:00 |
|
Andrew Kozlik
|
c2c1591f5c
|
chore(core): Improve VTRUST bits documentation and naming.
[no changelog]
|
2024-05-17 14:37:38 +02:00 |
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tychovrahe
|
1600759457
|
refactor(core): simplify secret.h api, hide platform differences
[no changelog]
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2024-04-11 16:13:58 +02:00 |
|
tychovrahe
|
c3f84e2949
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perf(core): optimize boot speed on U5 by using has processor to calculate image hashes, switches to sha256
[no changelog]
|
2024-02-29 23:05:56 +01:00 |
|
grdddj
|
b8ea21d24a
|
feat(all): implement translations into Trezor
Co-authored-by matejcik <ja@matejcik.cz>
|
2024-02-12 14:49:32 +01:00 |
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cepetr
|
ba83a7e644
|
feat(core): introduce interaction-less upgrade
|
2023-10-27 16:15:15 +02:00 |
|
tychovrahe
|
8a4f376f20
|
refactor(core): prepare fw for differently sized fw chunks
[no changelog]
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2023-10-20 16:33:53 +02:00 |
|
tychovrahe
|
e8281385f6
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feat(core): implement secret handling in bootloader
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2023-08-15 09:37:38 +02:00 |
|
tychovrahe
|
238e3fd7c1
|
refactor(core): add abstraction over flash memory layout
[no changelog]
|
2023-07-25 10:25:20 +02:00 |
|