tychovrahe
f7a3aad9bd
feat(core): initial Model R display implementation with framebuffer
2022-05-10 16:49:23 +02:00
grdddj
12da7f301d
feat(core): allow for model R in firmware build
...
As model R will run on the same computational hardware as model T,
memory_R.ld is just a symbolic link to memory_T.ld.
[no changelog]
2022-05-06 11:44:52 +02:00
TychoVrahe
7912a7d0d3
build(core,storage): fix conditional compilation for different Trezor models
...
* build(core,storage) - Fix conditional compilation for different trezor models
* build(core) - Rename MODEL_* macro to TREZOR_MODEL_*, remove the original TREZOR_MODEL macro (replaced by conditional compilation for QSTR generation)
* build(core) - fixed missing TREZOR_MODEL to TREZOR_MODEL_x changes
[no changelog]
2022-04-26 13:47:40 +02:00
Ondřej Vejpustek
ad38d8e324
refactor(crypto,core): make zkp_context_init() return status
2021-11-18 19:05:40 +01:00
Ondřej Vejpustek
26463eb3ce
feat(core): make core use ecdsa from secp256k1_zkp wherever possible
2021-10-25 14:41:28 +02:00
Ondrej Mikle
6ea4b7b211
fix(core & legacy): better styled compiler checks
2021-09-27 15:42:29 +02:00
Ondrej Mikle
6b849b1d4d
fix(core & legacy): avoid accidental build with broken stack protector
2021-09-27 15:42:29 +02:00
Martin Milata
bd005e33df
refactor(core): decouple T1 button handling from touch
...
[no changelog]
2021-09-23 12:30:13 +02:00
Martin Milata
aace875fef
chore(vendor): bump micropython to 1.17
...
Relevant micropython commits:
d1bfb271d7686708fe8711a177629c8bf6e7f6a6 lib/uzlib: Move uzlib code from extmod to lib.
4d546713ec8858cbf908de45de11cbfc46a20971 shared: Introduce new top-level dir and move 1st party lib code there.
ca920f72184c50f61002aa9d5cd01555b1e28b7b py/mpstate: Make exceptions thread-local.
2021-09-17 11:18:14 +02:00
Ondřej Vejpustek
24200e7424
fixup! fix(legacy): make RDI work on T1
2021-06-24 17:34:24 +02:00
Ondrej Mikle
daa94ac941
fix(legacy): make RDI work on T1
2021-06-24 17:34:24 +02:00
Ondřej Vejpustek
4968d7da53
feat(core): implement svc shutdown
2021-06-23 16:40:45 +02:00
Ondřej Vejpustek
7686eb355a
fix(core): fix import of random delays
2021-06-23 16:40:45 +02:00
Ondřej Vejpustek
6fd4739c5c
feat(core): make random delays use chacha_drbg
2021-05-21 13:42:53 +02:00
Ondřej Vejpustek
8ee17f69b3
refactor(core): move wait_random and rdi into separate file
2021-05-21 13:42:53 +02:00
Pavol Rusnak
814db111b2
feat(core): add define to invert display colors on ST7789V
2021-03-10 16:06:18 +01:00
Ondrej Mikle
869cfbbd1c
style(core): style for systemview
2021-01-26 20:53:38 +01:00
Ondrej Mikle
5f837e12b9
feat(core): send messaged through systemview
2021-01-26 20:53:38 +01:00
Ondrej Mikle
c5e986b1ba
feat(core): enable SystemView at firmware start
2021-01-26 20:53:38 +01:00
matejcik
f723dca7b1
core: enable PYSTACK
2020-07-24 14:09:31 +02:00
Ondrej Mikle
33d2bf417b
core: replace bootloader only in production. Fix device for T1 core port JLink upload
2020-07-13 10:45:32 +02:00
Ondřej Vejpustek
c461692f3a
core: implement random delay interrupts
2020-04-16 11:51:28 +02:00
Pavol Rusnak
3de1b3aa54
core/embed: switch to unprivileged in main.c
2020-01-24 12:29:46 +00:00
Jan Pochyla
7deade5a10
core/firmware: PendSV_Handler is defined in pendsv.c
2020-01-07 20:52:43 +01:00
Pavol Rusnak
a9e5149b95
core: reorganize source code to allow boardloader build
...
(after DMA changes)
2019-12-15 08:43:00 +00:00
Pavol Rusnak
b34675401c
core/embed: add explicit fault handlers
2019-12-11 16:40:58 +00:00
Pavol Rusnak
c8c27dcd2f
core/embed: enable/disable SDIO/DMA interrupts via supervisor calls
2019-12-11 15:28:49 +00:00
Pavol Rusnak
54d348228f
all: rename TREZOR to Trezor where possible
2019-06-17 20:28:29 +02:00
Andrew Kozlik
f677a0f0db
core: Use PRNG when generating random delays.
2019-06-11 11:41:40 +02:00
matejcik
e5670856a2
MONOREPO CREATE FROM trezor-core
2019-04-15 19:14:40 +02:00
