arno/trezor-firmware
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Code Issues Releases Wiki Activity
12,583 Commits 368 Branches 205 Tags 206 MiB
8c7fc45991
Commit Graph

147 Commits

Author SHA1 Message Date
Andrew Kozlik
c1fa1c0cbc chore(core): Fix common name in emulator device certificate. 
[no changelog]
 2023-12-15 11:18:22 +01:00
Andrew Kozlik
fb80dd5a36 fix(core/prodtest): Fix Optiga metadata version information handling. 
[no changelog]
 2023-12-15 11:18:22 +01:00
Andrew Kozlik
cbea765e38 feat(core/prodtest): Verify device certificate chain in CERTDEV WRITE. 
[no changelog]
 2023-12-08 12:30:28 +01:00
Andrew Kozlik
3a5aecf6cd feat(core/prodtest): Add SEC READ command. 
[no changelog]
 2023-12-08 12:30:28 +01:00
Andrew Kozlik
d670a0bdfa feat(core): Fix malformed signatures from Optiga. 2023-12-01 00:09:17 +01:00
tychovrahe
47f8a430e6 refactor(core): remove residual usage of old flash api 
[no changelog]
 2023-11-22 11:45:54 +01:00
Martin Milata
1c69644fe0 build(core): add flag for disabling optiga on debug builds 
[skip_ci]
 2023-11-14 12:47:22 +01:00
tychovrahe
10021bf364 chore(core): fix gen and style problems 
[no changelog]
 2023-10-31 13:32:20 +01:00
cepetr
da7125f427 feat(core/bootloader): make firmware flashing more safe 2023-10-27 16:41:56 +02:00
cepetr
ba83a7e644 feat(core): introduce interaction-less upgrade 2023-10-27 16:15:15 +02:00
matejcik
4f2c639ed7 feat(core): T2B1 final design for emulator 2023-10-12 12:58:37 +02:00
tychovrahe
df42c99bc9 feat(core): add basic support for efficient frame buffer graphics 
[no changelog]
 2023-10-10 19:01:43 +02:00
Andrew Kozlik
3ca8f26fd0 feat(core): Implement Optiga counter operations. 2023-10-04 11:22:46 +02:00
Andrew Kozlik
1fa2929607 feat(core): Distinguish Optiga errors from invalid PIN. 2023-10-04 11:22:46 +02:00
Andrew Kozlik
4c7979ae30 feat(core): Propagate Optiga errors. 2023-10-04 11:22:46 +02:00
matejcik
240f4f56cd fix(core/optiga): add correct key usage to OID_PIN_CMAC 2023-10-04 11:22:46 +02:00
matejcik
3c413ecf02 fix(storage): correctly fail when Optiga operations fail 2023-10-04 11:22:46 +02:00
tychovrahe
c937f21447 refactor(core): change the way USE_OPTIGA is added to build 
[no changelog]
 2023-10-02 20:59:50 +02:00
tychovrahe
e39ab74949 fix(core): adjust T2B1 display SPI baudrate 
[no changelog]
 2023-10-02 16:45:05 +02:00
Andrew Kozlik
b3d0fb68ff feat(core): Improve Optiga transport error handling. 2023-09-27 17:17:09 +02:00
Andrew Kozlik
7d92e70cc3 feat(core): Hide repetitions in Optiga logging. 2023-09-27 17:17:09 +02:00
Andrew Kozlik
dee559f4f9 feat(core): Integrate Optiga into PIN verification. 2023-09-27 17:17:09 +02:00
Andrew Kozlik
6ca1182d85 refactor(core): Add "META" to metadate-related Optiga constants. 
[no changelog]
 2023-09-27 17:17:09 +02:00
tychovrahe
5d017e928d fix(core): reset optiga during initialization 
[no changelog]
 2023-09-27 12:14:32 +02:00
tychovrahe
510281590f fix(core): add delays to optiga i2c communications 
[no changelog]
 2023-09-27 12:14:32 +02:00
Andrew Kozlik
1f7c78a4ed test(core): Update emulator device certificate. 
[no changelog]
 2023-09-19 21:41:42 +02:00
Andrew Kozlik
c48b606867 feat(core): Add bootloader_locked flag to Features message. 
[no changelog]
 2023-09-15 14:08:02 +02:00
tychovrahe
f881fab797 fix(core): disable access to secret in flash after boot 
[no changelog]
 2023-09-15 13:31:24 +02:00
Andrew Kozlik
686aa78aa7 feat(core): Use Optiga as a source of randomness. 2023-09-15 11:16:57 +02:00
tychovrahe
024ea604ca fix(core): fix optiga warm reset start-up time 
[no changelog]
 2023-09-13 15:45:48 +02:00
Andrew Kozlik
db6630a5a3 feat(core): Support Optiga in Trezor firmware. 2023-09-13 15:45:48 +02:00
Ondrej Mikle
bf96c43d32 chore(core): cstyle reformat 
DSVibram AR fix
 2023-09-11 14:36:11 +02:00
Ondrej Mikle
75a148e414 fix(core): clear memory when not going to use copy firmware header for bootloader 2023-09-11 14:36:11 +02:00
Ondrej Mikle
c0c544b7d8 fix(core): fix bootloader_ci startup, remove unused function from limited_util.s 
Fix changelog messages
 2023-09-11 14:36:11 +02:00
Ondrej Mikle
b69ef9d168 feat(core): Copy firmware image header to bootloader RAM to be able to skip directly to firmware install, jumping from firmware to bootloader 
Change linking of util.s and limited version of util.s to avoid mistakes
with boardloader etc.
 2023-09-11 14:36:11 +02:00
tychovrahe
33fc64b629 refactor(core): remove universal DMA driver 
[no changelog]
 2023-08-29 11:17:03 +02:00
matejcik
04ea95777b chore(core/prodtest): enable Optiga locking 2023-08-29 10:59:34 +02:00
Andrew Kozlik
5898b16cd2 feat(core): Implement OPTIGA VerifySign command. 2023-08-29 10:59:34 +02:00
tychovrahe
5470304515 feat(core): Implement OPTIGA provisioning in prodtest. 
[no changelog]
 2023-08-29 10:59:34 +02:00
Andrew Kozlik
812e77cefd feat(core): Implement OPTIGA secure channel. 2023-08-29 10:59:34 +02:00
Andrew Kozlik
11e1795a89 refactor(core): optiga_execute_command() 
- Remove presentation layer parameter.
- Use error-flushing command codes.
 2023-08-29 10:59:34 +02:00
Andrew Kozlik
773f79251f feat(core): Implement comparison of OPTIGA metadata. 2023-08-29 10:59:34 +02:00
tychovrahe
90bdab6599 fix(core): fixed unwanted delays in T2B1 
[no changelog]
 2023-08-18 16:13:58 +02:00
matejcik
c0de11fbeb fix(core): use stm32f4 implementation of secret.c for unix too 
(fixes bootloader_emu build because there was an error in the unix dummy
impl)
 2023-08-16 10:32:25 +02:00
tychovrahe
e8281385f6 feat(core): implement secret handling in bootloader 2023-08-15 09:37:38 +02:00
Andrew Kozlik
74759310bb feat(core): Integrate OPTIGA Trust M 
[no changelog]
 2023-08-02 00:35:43 +02:00
tychovrahe
238e3fd7c1 refactor(core): add abstraction over flash memory layout 
[no changelog]
 2023-07-25 10:25:20 +02:00
tychovrahe
fa71c8244c fix(core): fix MPU settings 
[no changelog]
 2023-07-21 12:28:13 +02:00
tychovrahe
ad1f2360bd fix(core): replace systick based wait in display SPI with loop as systick does not work in fault handlers 
[no changelog]
 2023-07-21 12:27:54 +02:00
tychovrahe
ebbd7f9d35 refactor(core): restructure trezorhal, prepare to support more platforms 
[no changelog]
 2023-07-07 22:09:56 +02:00