cepetr
|
fc2f9c5949
|
feat(core): add powerctl_suspend syscall
[no changelog]
|
2025-01-14 07:52:15 +01:00 |
|
cepetr
|
f3793fd8c4
|
fix(core): panic on invalid syscall number
[no changelog]
|
2025-01-14 07:52:15 +01:00 |
|
cepetr
|
22f132c935
|
fix(core): fix suspending to STOP2 mode
[no changelog]
|
2025-01-14 07:52:15 +01:00 |
|
cepetr
|
4fda1c4dfb
|
feat(core): introduce USE_USB feature
[no changelog]
|
2025-01-14 07:52:15 +01:00 |
|
tychovrahe
|
eef2f4113f
|
refactor(core): improve USB events handling, more extensible implementation
[no changelog]
|
2025-01-13 18:46:11 +01:00 |
|
Martin Milata
|
dadff32f39
|
build(core): use internal model names everywhere
TREZOR_MODEL=T and TREZOR_MODEL=R
no longer work, please use
TREZOR_MODEL=T2T1 and TREZOR_MODEL=T2B1
[no changelog]
|
2025-01-13 16:24:35 +01:00 |
|
tychovrahe
|
33bb7ef410
|
fix(core): increase framebuffer section size on U5G models
[no changelog]
|
2025-01-06 11:42:40 +01:00 |
|
kopecdav
|
35c0ada42b
|
refactor(core/prodtest): Put patch_and_update function to separate source file
|
2025-01-03 16:30:14 +01:00 |
|
kopecdav
|
4c312aabfe
|
feat(core/prodtest): Add stwlc38 update from host feature [no changelog]
|
2025-01-03 16:30:14 +01:00 |
|
tychovrahe
|
04a1b3943f
|
chore(core): re-balance distribution in flash on F4 models
[no changelog]
|
2025-01-02 11:41:48 +01:00 |
|
tychovrahe
|
0bc729a3da
|
refactor(core): streamline RAM layout
[no changelog]
|
2024-12-11 21:41:52 +01:00 |
|
cepetr
|
9d2d96f832
|
feat(core): add npm1300 buck regulator control
[no changelog]
|
2024-12-11 14:45:16 +01:00 |
|
cepetr
|
a6acabd917
|
refactor(core): introduce drivers init/deinit in boot/boardloader
[no changelog]
|
2024-12-11 14:45:16 +01:00 |
|
cepetr
|
519a1a0f7b
|
feat(core): introduce powerctl module
[no changelog]
|
2024-12-11 14:45:16 +01:00 |
|
cepetr
|
97dbf2fab3
|
feat(core): introduce stwlc38 driver
[no changelog]
|
2024-12-11 14:45:16 +01:00 |
|
cepetr
|
1da149f129
|
feat(core): introduce npm1300 driver
[no changelog]
|
2024-12-11 14:45:16 +01:00 |
|
tychovrahe
|
b4ba056a39
|
fix(core): fix translation area access from coreapp applet
[no changelog]
|
2024-12-05 17:17:08 +01:00 |
|
matejcik
|
cba7ed517f
|
fix(core/kernel): properly cut off error message
|
2024-11-25 16:23:05 +01:00 |
|
tychovrahe
|
b0dd521c5d
|
fix(core): separate bootargs from kernel/aux SRAM
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
40c5426717
|
fix(core): fix MPU kernel sram setting for STM32U5G
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
b4c95f4c16
|
fix(core): fix systick frequency computation by utilizing HSE_VALUE properly
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
2da2826020
|
feat(core): add RGB LED syscalls
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
bbf97c7141
|
fix(core): fix clock setting on U5 for 32 MHz HSE
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
cepetr
|
089db2cadf
|
refactor(core): restructure embed folder
[no changelog]
|
2024-11-18 09:41:02 +01:00 |
|