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refactor(core): add new linker scripts consts for memory cleanup

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cepetr 2025-01-29 21:34:20 +01:00 committed by cepetr
parent 7613fe310a
commit 70c577b67b
12 changed files with 97 additions and 1 deletions
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8
core/embed/sys/linker/stm32f4/boardloader.ld
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@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0;
_confidential_section_start = 0;
_confidential_section_end = 0;
_accessible_ram_0_start = MCU_CCMRAM;
_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE;
_accessible_ram_1_start = MCU_SRAM;
_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_CCMRAM;
_startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE;

8
core/embed/sys/linker/stm32f4/bootloader.ld
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@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0;
_confidential_section_start = 0;
_confidential_section_end = 0;
_accessible_ram_0_start = MCU_CCMRAM;
_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE;
_accessible_ram_1_start = MCU_SRAM;
_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_CCMRAM;
_startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE - BOOTARGS_SIZE;

8
core/embed/sys/linker/stm32f4/kernel.ld
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@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0;
_confidential_section_start = 0;
_confidential_section_end = 0;
_accessible_ram_0_start = MCU_CCMRAM;
_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE;
_accessible_ram_1_start = MCU_SRAM;
_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_CCMRAM;
_startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE;

8
core/embed/sys/linker/stm32f4/prodtest.ld
View File

@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0;
_confidential_section_start = 0;
_confidential_section_end = 0;
_accessible_ram_0_start = MCU_CCMRAM;
_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE;
_accessible_ram_1_start = MCU_SRAM;
_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_CCMRAM;
_startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE;

9
core/embed/sys/linker/stm32u58/boardloader.ld
View File

@ -28,6 +28,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE - BOOTARGS_SIZE;
@ -54,7 +62,6 @@ _shutdown_clear_ram_2_end = 0;
_shutdown_clear_ram_3_start = 0;
_shutdown_clear_ram_3_end = 0;
SECTIONS {
.vector_table : ALIGN(CODE_ALIGNMENT) {
KEEP(*(.vector_table));

8
core/embed/sys/linker/stm32u58/bootloader.ld
View File

@ -27,6 +27,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE - BOOTARGS_SIZE;

8
core/embed/sys/linker/stm32u58/kernel.ld
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@ -30,6 +30,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE;

8
core/embed/sys/linker/stm32u58/prodtest.ld
View File

@ -27,6 +27,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE;

8
core/embed/sys/linker/stm32u5g/boardloader.ld
View File

@ -28,6 +28,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1 + BOOTARGS_SIZE;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE;

9
core/embed/sys/linker/stm32u5g/bootloader.ld
View File

@ -26,6 +26,15 @@ _bss_section_end = ADDR(.bss) + SIZEOF(.bss);
_confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1 + BOOTARGS_SIZE;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE;

8
core/embed/sys/linker/stm32u5g/kernel.ld
View File

@ -31,6 +31,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE;

8
core/embed/sys/linker/stm32u5g/prodtest.ld
View File

@ -27,6 +27,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential);
_confidential_section_start = ADDR(.confidential);
_confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential);
_accessible_ram_0_start = MCU_SRAM1;
_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE;
_accessible_ram_1_start = MCU_SRAM4;
_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE;
_bootargs_ram_start = BOOTARGS_START;
_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE;
/* used by the startup code to wipe memory */
_startup_clear_ram_0_start = MCU_SRAM1;
_startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE;