diff --git a/core/embed/sys/linker/stm32f4/boardloader.ld b/core/embed/sys/linker/stm32f4/boardloader.ld index 720d77db06..8804627057 100644 --- a/core/embed/sys/linker/stm32f4/boardloader.ld +++ b/core/embed/sys/linker/stm32f4/boardloader.ld @@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0; _confidential_section_start = 0; _confidential_section_end = 0; +_accessible_ram_0_start = MCU_CCMRAM; +_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE; +_accessible_ram_1_start = MCU_SRAM; +_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_CCMRAM; _startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE; diff --git a/core/embed/sys/linker/stm32f4/bootloader.ld b/core/embed/sys/linker/stm32f4/bootloader.ld index 8963fd6ac7..fdd3937051 100644 --- a/core/embed/sys/linker/stm32f4/bootloader.ld +++ b/core/embed/sys/linker/stm32f4/bootloader.ld @@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0; _confidential_section_start = 0; _confidential_section_end = 0; +_accessible_ram_0_start = MCU_CCMRAM; +_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE; +_accessible_ram_1_start = MCU_SRAM; +_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_CCMRAM; _startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE - BOOTARGS_SIZE; diff --git a/core/embed/sys/linker/stm32f4/kernel.ld b/core/embed/sys/linker/stm32f4/kernel.ld index 0d05aa6c74..64c6bbef2b 100644 --- a/core/embed/sys/linker/stm32f4/kernel.ld +++ b/core/embed/sys/linker/stm32f4/kernel.ld @@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0; _confidential_section_start = 0; _confidential_section_end = 0; +_accessible_ram_0_start = MCU_CCMRAM; +_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE; +_accessible_ram_1_start = MCU_SRAM; +_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_CCMRAM; _startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE; diff --git a/core/embed/sys/linker/stm32f4/prodtest.ld b/core/embed/sys/linker/stm32f4/prodtest.ld index 20f27efbc2..ed42acc779 100644 --- a/core/embed/sys/linker/stm32f4/prodtest.ld +++ b/core/embed/sys/linker/stm32f4/prodtest.ld @@ -25,6 +25,14 @@ _confidential_section_loadaddr = 0; _confidential_section_start = 0; _confidential_section_end = 0; +_accessible_ram_0_start = MCU_CCMRAM; +_accessible_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE; +_accessible_ram_1_start = MCU_SRAM; +_accessible_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_CCMRAM; _startup_clear_ram_0_end = MCU_CCMRAM + MCU_CCMRAM_SIZE; diff --git a/core/embed/sys/linker/stm32u58/boardloader.ld b/core/embed/sys/linker/stm32u58/boardloader.ld index e3ae88f15b..a9aa021346 100644 --- a/core/embed/sys/linker/stm32u58/boardloader.ld +++ b/core/embed/sys/linker/stm32u58/boardloader.ld @@ -28,6 +28,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE - BOOTARGS_SIZE; @@ -54,7 +62,6 @@ _shutdown_clear_ram_2_end = 0; _shutdown_clear_ram_3_start = 0; _shutdown_clear_ram_3_end = 0; - SECTIONS { .vector_table : ALIGN(CODE_ALIGNMENT) { KEEP(*(.vector_table)); diff --git a/core/embed/sys/linker/stm32u58/bootloader.ld b/core/embed/sys/linker/stm32u58/bootloader.ld index 297e0b4c1e..3e4fea9637 100644 --- a/core/embed/sys/linker/stm32u58/bootloader.ld +++ b/core/embed/sys/linker/stm32u58/bootloader.ld @@ -27,6 +27,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE - BOOTARGS_SIZE; diff --git a/core/embed/sys/linker/stm32u58/kernel.ld b/core/embed/sys/linker/stm32u58/kernel.ld index 09e685c1b9..b8e8f5694b 100644 --- a/core/embed/sys/linker/stm32u58/kernel.ld +++ b/core/embed/sys/linker/stm32u58/kernel.ld @@ -30,6 +30,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE; diff --git a/core/embed/sys/linker/stm32u58/prodtest.ld b/core/embed/sys/linker/stm32u58/prodtest.ld index 0ae7d5cede..7e1310c89d 100644 --- a/core/embed/sys/linker/stm32u58/prodtest.ld +++ b/core/embed/sys/linker/stm32u58/prodtest.ld @@ -27,6 +27,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM3 + MCU_SRAM3_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE; diff --git a/core/embed/sys/linker/stm32u5g/boardloader.ld b/core/embed/sys/linker/stm32u5g/boardloader.ld index 9128b3c72e..fb52947012 100644 --- a/core/embed/sys/linker/stm32u5g/boardloader.ld +++ b/core/embed/sys/linker/stm32u5g/boardloader.ld @@ -28,6 +28,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1 + BOOTARGS_SIZE; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE; diff --git a/core/embed/sys/linker/stm32u5g/bootloader.ld b/core/embed/sys/linker/stm32u5g/bootloader.ld index 1e0799c974..324660af06 100644 --- a/core/embed/sys/linker/stm32u5g/bootloader.ld +++ b/core/embed/sys/linker/stm32u5g/bootloader.ld @@ -26,6 +26,15 @@ _bss_section_end = ADDR(.bss) + SIZEOF(.bss); _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); + +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1 + BOOTARGS_SIZE; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE; diff --git a/core/embed/sys/linker/stm32u5g/kernel.ld b/core/embed/sys/linker/stm32u5g/kernel.ld index b212a23dc1..ff8a6c7775 100644 --- a/core/embed/sys/linker/stm32u5g/kernel.ld +++ b/core/embed/sys/linker/stm32u5g/kernel.ld @@ -31,6 +31,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE; diff --git a/core/embed/sys/linker/stm32u5g/prodtest.ld b/core/embed/sys/linker/stm32u5g/prodtest.ld index ca1e757d52..dc767cb5b9 100644 --- a/core/embed/sys/linker/stm32u5g/prodtest.ld +++ b/core/embed/sys/linker/stm32u5g/prodtest.ld @@ -27,6 +27,14 @@ _confidential_section_loadaddr = LOADADDR(.confidential); _confidential_section_start = ADDR(.confidential); _confidential_section_end = ADDR(.confidential) + SIZEOF(.confidential); +_accessible_ram_0_start = MCU_SRAM1; +_accessible_ram_0_end = MCU_SRAM6 + MCU_SRAM6_SIZE; +_accessible_ram_1_start = MCU_SRAM4; +_accessible_ram_1_end = MCU_SRAM4 + MCU_SRAM4_SIZE; + +_bootargs_ram_start = BOOTARGS_START; +_bootargs_ram_end = BOOTARGS_START + BOOTARGS_SIZE; + /* used by the startup code to wipe memory */ _startup_clear_ram_0_start = MCU_SRAM1; _startup_clear_ram_0_end = MCU_SRAM1 + MCU_SRAM1_SIZE;