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Merge pull request #1004 from trezor/omikle/t1-unofficial-fw
T1 core port able to run on T1 bootloader if it has MEMORY_PROTECT=0 or FW is signed
This commit is contained in:
commit
6fafe4c9ee
@ -23,12 +23,14 @@ RDI ?= 1
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STLINK_VER ?= v2
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STLINK_VER ?= v2
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OPENOCD = openocd -f interface/stlink-$(STLINK_VER).cfg -c "transport select hla_swd" -f target/stm32f4x.cfg
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OPENOCD = openocd -f interface/stlink-$(STLINK_VER).cfg -c "transport select hla_swd" -f target/stm32f4x.cfg
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OPENOCD_T1 = openocd -f interface/stlink-$(STLINK_VER).cfg -c "transport select hla_swd" -f target/stm32f2x.cfg
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BOARDLOADER_START = 0x08000000
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BOARDLOADER_START = 0x08000000
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BOOTLOADER_START = 0x08020000
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BOOTLOADER_START = 0x08020000
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FIRMWARE_P1_START = 0x08040000
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FIRMWARE_P1_START = 0x08040000
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FIRMWARE_P2_START = 0x08120000
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FIRMWARE_P2_START = 0x08120000
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PRODTEST_START = 0x08040000
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PRODTEST_START = 0x08040000
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FIRMWARE_T1_START = 0x08010000
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BOARDLOADER_MAXSIZE = 49152
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BOARDLOADER_MAXSIZE = 49152
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BOOTLOADER_MAXSIZE = 131072
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BOOTLOADER_MAXSIZE = 131072
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@ -191,6 +193,9 @@ flash_prodtest: $(PRODTEST_BUILD_DIR)/prodtest.bin ## flash prodtest using OpenO
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flash_firmware: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash firmware using OpenOCD
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flash_firmware: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash firmware using OpenOCD
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$(OPENOCD) -c "init; reset halt; flash write_image erase $<.p1 $(FIRMWARE_P1_START); flash write_image erase $<.p2 $(FIRMWARE_P2_START); exit"
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$(OPENOCD) -c "init; reset halt; flash write_image erase $<.p1 $(FIRMWARE_P1_START); flash write_image erase $<.p2 $(FIRMWARE_P2_START); exit"
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flash_firmware_t1: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash T1 core port on T1 using OpenOCD
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$(OPENOCD_T1) -c "init; reset halt; flash write_image erase $< $(FIRMWARE_T1_START); exit"
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flash_combine: $(PRODTEST_BUILD_DIR)/combined.bin ## flash combined using OpenOCD
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flash_combine: $(PRODTEST_BUILD_DIR)/combined.bin ## flash combined using OpenOCD
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$(OPENOCD) -c "init; reset halt; flash write_image erase $< $(BOARDLOADER_START); exit"
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$(OPENOCD) -c "init; reset halt; flash write_image erase $< $(BOARDLOADER_START); exit"
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@ -211,6 +216,9 @@ flash_firmware_jlink: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash firmware using
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cp -f $<.p2 $<.p2.bin
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cp -f $<.p2 $<.p2.bin
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JLinkExe -commanderscript embed/firmware/firmware_flash.jlink
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JLinkExe -commanderscript embed/firmware/firmware_flash.jlink
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flash_firmware_t1_jlink: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash T1 core port via JLink
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JLinkExe -commanderscript embed/firmware/firmware_flash_t1.jlink
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## openocd debug commands:
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## openocd debug commands:
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openocd: ## start openocd which connects to the device
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openocd: ## start openocd which connects to the device
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7
core/embed/firmware/firmware_flash_t1.jlink
Normal file
7
core/embed/firmware/firmware_flash_t1.jlink
Normal file
@ -0,0 +1,7 @@
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device CORTEX-M3
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if swd
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speed 50000
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loadbin build/firmware/firmware.bin 0x08010000
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r
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g
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exit
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@ -6,7 +6,15 @@
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.type reset_handler, STT_FUNC
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.type reset_handler, STT_FUNC
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reset_handler:
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reset_handler:
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// The following loading of VTOR address only works if T1 bootloader was built with MEMORY_PROTECT=0
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// or the firmware was properly signed. All other variants end up in hard fault due to MPU
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// (cf mpu_config_firmware in legacy bootloader)
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#if TREZOR_MODEL == 1
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#if TREZOR_MODEL == 1
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ldr r0, =0xE000ED08 // r0 = VTOR address
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ldr r1, =0x08010400 // r1 = FLASH_APP_START
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str r1, [r0] // assign
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ldr r0, =_estack - 8 // r0 = stack pointer, T1 bootloader had 8 bytes reserved at end
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ldr r0, =_estack - 8 // r0 = stack pointer, T1 bootloader had 8 bytes reserved at end
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msr msp, r0 // set stack pointer
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msr msp, r0 // set stack pointer
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dsb
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dsb
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