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core: Adds T1 core port FW flashing options for for openocd and jlink

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This commit is contained in:
Ondrej Mikle 2020-05-21 10:05:12 +02:00
parent 0d65d684f0
commit 10f0f107e0
2 changed files with 15 additions and 0 deletions
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8
core/Makefile
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@ -23,12 +23,14 @@ RDI ?= 1
STLINK_VER ?= v2
OPENOCD = openocd -f interface/stlink-$(STLINK_VER).cfg -c "transport select hla_swd" -f target/stm32f4x.cfg
OPENOCD_T1 = openocd -f interface/stlink-$(STLINK_VER).cfg -c "transport select hla_swd" -f target/stm32f2x.cfg
BOARDLOADER_START = 0x08000000
BOOTLOADER_START = 0x08020000
FIRMWARE_P1_START = 0x08040000
FIRMWARE_P2_START = 0x08120000
PRODTEST_START = 0x08040000
FIRMWARE_T1_START = 0x08010000
BOARDLOADER_MAXSIZE = 49152
BOOTLOADER_MAXSIZE = 131072
@ -191,6 +193,9 @@ flash_prodtest: $(PRODTEST_BUILD_DIR)/prodtest.bin ## flash prodtest using OpenO
flash_firmware: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash firmware using OpenOCD
$(OPENOCD) -c "init; reset halt; flash write_image erase $<.p1 $(FIRMWARE_P1_START); flash write_image erase $<.p2 $(FIRMWARE_P2_START); exit"
flash_firmware_t1: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash T1 core port on T1 using OpenOCD
$(OPENOCD_T1) -c "init; reset halt; flash write_image erase $< $(FIRMWARE_T1_START); exit"
flash_combine: $(PRODTEST_BUILD_DIR)/combined.bin ## flash combined using OpenOCD
$(OPENOCD) -c "init; reset halt; flash write_image erase $< $(BOARDLOADER_START); exit"
@ -211,6 +216,9 @@ flash_firmware_jlink: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash firmware using
cp -f $<.p2 $<.p2.bin
JLinkExe -commanderscript embed/firmware/firmware_flash.jlink
flash_firmware_t1_jlink: $(FIRMWARE_BUILD_DIR)/firmware.bin ## flash T1 core port via JLink
JLinkExe -commanderscript embed/firmware/firmware_flash_t1.jlink
## openocd debug commands:
openocd: ## start openocd which connects to the device

7
core/embed/firmware/firmware_flash_t1.jlink Normal file
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@ -0,0 +1,7 @@
device CORTEX-M3
if swd
speed 50000
loadbin build/firmware/firmware.bin 0x08010000
r
g
exit