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fix(core): correct swapped F4/U5 reset flags

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This commit is contained in:
cepetr 2024-10-22 22:07:45 +02:00 committed by cepetr
parent a1ab50017d
commit 3a19609035
2 changed files with 5 additions and 5 deletions
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5
core/embed/trezorhal/stm32f4/reset_flags.c
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@ -29,8 +29,9 @@ secbool reset_flags_check(void) {
// for production. check the reset flags to assure that we arrive here due to // for production. check the reset flags to assure that we arrive here due to
// a regular full power-on event, and not as a result of a lesser reset. // a regular full power-on event, and not as a result of a lesser reset.
if ((RCC->CSR & (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | if ((RCC->CSR & (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF |
RCC_CSR_SFTRSTF | RCC_CSR_PINRSTF | RCC_CSR_BORRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF |
RCC_CSR_OBLRSTF)) != (RCC_CSR_PINRSTF | RCC_CSR_BORRSTF)) { RCC_CSR_BORRSTF)) !=
(RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_BORRSTF)) {
return secfalse; return secfalse;
} }
#endif #endif

5
core/embed/trezorhal/stm32u5/reset_flags.c
View File

@ -29,9 +29,8 @@ secbool reset_flags_check(void) {
// for production. check the reset flags to assure that we arrive here due to // for production. check the reset flags to assure that we arrive here due to
// a regular full power-on event, and not as a result of a lesser reset. // a regular full power-on event, and not as a result of a lesser reset.
if ((RCC->CSR & (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | if ((RCC->CSR & (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF |
RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PINRSTF | RCC_CSR_BORRSTF |
RCC_CSR_BORRSTF)) != RCC_CSR_OBLRSTF)) != (RCC_CSR_PINRSTF | RCC_CSR_BORRSTF)) {
(RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_BORRSTF)) {
return secfalse; return secfalse;
} }
#endif #endif