2017-03-21 00:41:49 +00:00
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#include STM32_HAL_H
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2017-04-17 16:07:34 +00:00
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#include "common.h"
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2017-03-21 00:41:49 +00:00
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#include "display.h"
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2017-10-11 10:58:36 +00:00
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#include "rng.h"
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2017-03-21 00:41:49 +00:00
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2017-10-11 22:32:46 +00:00
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void __attribute__((noreturn)) __fatal_error(const char *expr, const char *msg, const char *file, int line, const char *func) {
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2017-04-28 17:50:51 +00:00
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for (volatile uint32_t delay = 0; delay < 10000000; delay++) {}
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2017-09-07 20:19:27 +00:00
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display_orientation(0);
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display_backlight(255);
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2017-04-28 17:50:51 +00:00
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display_print_color(COLOR_WHITE, COLOR_RED128);
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2017-10-11 22:32:46 +00:00
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display_printf("\nFATAL ERROR:\n");
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if (expr) {
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display_printf("expr: %s\n", expr);
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}
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if (msg) {
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display_printf("msg : %s\n", msg);
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}
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2017-04-28 13:39:22 +00:00
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if (file) {
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2017-10-11 22:32:46 +00:00
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display_printf("file: %s:%d\n", file, line);
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2017-04-28 13:39:22 +00:00
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}
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if (func) {
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2017-10-11 22:32:46 +00:00
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display_printf("func: %s\n", func);
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2017-04-28 13:39:22 +00:00
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}
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2017-09-07 20:19:27 +00:00
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for (;;);
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2017-03-21 00:41:49 +00:00
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}
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2017-10-11 19:15:22 +00:00
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uint32_t __stack_chk_guard;
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void __attribute__((noreturn)) __stack_chk_fail(void)
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{
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2017-10-11 22:32:46 +00:00
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trassert(0, "Stack smashing detected");
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2017-10-11 19:15:22 +00:00
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}
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2017-04-28 13:39:22 +00:00
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#ifndef NDEBUG
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void __assert_func(const char *file, int line, const char *func, const char *expr) {
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2017-10-11 22:32:46 +00:00
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__fatal_error(expr, "assert failed", file, line, func);
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2017-04-28 13:39:22 +00:00
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}
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#endif
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2017-03-23 15:22:58 +00:00
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void periph_init(void) {
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// STM32F4xx HAL library initialization:
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// - configure the Flash prefetch, instruction and data caches
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// - configure the Systick to generate an interrupt each 1 msec
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// - set NVIC Group Priority to 4
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// - global MSP (MCU Support Package) initialization
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HAL_Init();
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// Enable GPIO clocks
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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// Clear the reset flags
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PWR->CR |= PWR_CR_CSBF;
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RCC->CSR |= RCC_CSR_RMVF;
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// Enable CPU ticks
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; // Enable DWT
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DWT->CYCCNT = 0; // Reset Cycle Count Register
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DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; // Enable Cycle Count Register
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}
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2017-03-29 18:50:45 +00:00
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2017-10-05 15:31:05 +00:00
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void hal_delay(uint32_t ms)
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{
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HAL_Delay(ms);
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}
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