.. |
amx_64_skip
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
amx_64_skip.asm
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
amx_64_skip.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_1_64_skip
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_1_64_skip.asm
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_1_64_skip.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_2_64_skip
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_2_64_skip.asm
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_2_64_skip.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_3_64_skip
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_3_64_skip.asm
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
avx2gather_3_64_skip.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
cr8_32
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
cr8_32.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
cr8_32.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
ignorew_evex_32
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
ignorew_evex_32.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
ignorew_evex_64
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
ignorew_evex_64.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_32_skip
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_32_skip.asm
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_32_skip.result
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Multiple improvements
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2021-08-31 13:37:50 +03:00 |
invalid_64_skip
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_64_skip.asm
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_64_skip.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_evex_64_skip
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_evex_64_skip.asm
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
invalid_evex_64_skip.result
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
long_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
long_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
long_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
movcrdr_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
movcrdr_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
movcrdr_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
only_32
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
only_32.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
only_32.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
only_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
only_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
only_64.result
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Multiple improvements
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2021-08-31 13:37:50 +03:00 |
regressions_32
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Fixed RET with immediate - the immediate is not sign-extended.
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2020-07-23 14:08:01 +03:00 |
regressions_32.asm
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Fixed RET with immediate - the immediate is not sign-extended.
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2020-07-23 14:08:01 +03:00 |
regressions_32.result
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Multiple improvements
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2021-08-31 13:37:50 +03:00 |
regressions_64
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Fixed RET with immediate - the immediate is not sign-extended.
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2020-07-23 14:08:01 +03:00 |
regressions_64.asm
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Fixed RET with immediate - the immediate is not sign-extended.
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2020-07-23 14:08:01 +03:00 |
regressions_64.result
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Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
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2021-05-17 09:04:34 +03:00 |