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d622f56211
bddisasm/isagenerator/instructions
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Andrei Vlad LUTAS d622f56211 Added SERIAL flag to the SERIALIZE instruction. 
CLWB memory operand is subject to load access checks, while CLDEMOTE does not access memory at all (similar to PREFETCH).
2020-07-25 20:32:06 +03:00
..
cpuid.dat Fixed some typos. 2020-07-22 21:47:25 +03:00
flags.dat Fixed some typos. 2020-07-22 21:47:25 +03:00
modes.dat Fixed some typos. 2020-07-22 21:47:25 +03:00
prefixes.dat Initial commit. 2020-07-21 11:19:18 +03:00
table_0F_3A.dat Typo fixes in the instruction tables. 2020-07-21 16:38:09 +03:00
table_0F_38.dat Use the documented byte granularity for cache-line accesses. 2020-07-22 00:47:46 +03:00
table_0F.dat Added SERIAL flag to the SERIALIZE instruction. 2020-07-25 20:32:06 +03:00
table_3dnow.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_base.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_evex1.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_evex2.dat Added dedicated Prefetch operand access type. 2020-07-25 17:16:35 +03:00
table_evex3.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_fpu.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_vex1.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_vex2.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_vex3.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_xop.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00