arno/bddisasm
1
0
Fork 0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-12-23 06:28:13 +00:00
Code Issues Releases Wiki Activity
98ea9e1d9a
bddisasm/isagenerator/instructions
History
Andrei Vlad LUTAS 98ea9e1d9a Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37.
2021-01-11 11:10:04 +02:00
..
cpuid.dat Removed support for PCOMMIT and CL1INVMB (not implemented by any x86/x64 CPUs), and marked MOV to/from test registers as being invalid in long mode. 2020-11-09 09:18:46 +02:00
flags.dat Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
modes.dat Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
prefixes.dat Initial commit. 2020-07-21 11:19:18 +03:00
table_0F_3A.dat Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
table_0F_38.dat Added support for Intel Key Locker instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-key-locker-specification.html. 2020-09-16 11:56:05 +03:00
table_0F.dat Removed support for PCOMMIT and CL1INVMB (not implemented by any x86/x64 CPUs), and marked MOV to/from test registers as being invalid in long mode. 2020-11-09 09:18:46 +02:00
table_3dnow.dat Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37. 2021-01-11 11:10:04 +02:00
table_base.dat Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37. 2021-01-11 11:10:04 +02:00
table_evex1.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_evex2.dat Added dedicated Prefetch operand access type. 2020-07-25 17:16:35 +03:00
table_evex3.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_fpu.dat Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37. 2021-01-11 11:10:04 +02:00
table_vex1.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_vex2.dat Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
table_vex3.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
table_xop.dat Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00