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//
// This file was auto-generated by generate_tables.py from defs.dat. DO NOT MODIFY!
//
#ifndef INSTRUCTIONS_H
#define INSTRUCTIONS_H
const ND_INSTRUCTION gInstructions[2701] =
{
// Pos:0 Instruction:"AAA" Encoding:"0x37"/""
{
ND_INS_AAA, ND_CAT_DECIMAL, ND_SET_I86, 0,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_AF,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:1 Instruction:"AAD Ib" Encoding:"0xD5 ib"/"I"
{
ND_INS_AAD, ND_CAT_DECIMAL, ND_SET_I86, 1,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_CF|NDR_RFLAG_AF|NDR_RFLAG_OF,
0|NDR_RFLAG_CF|NDR_RFLAG_AF|NDR_RFLAG_OF,
{
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:2 Instruction:"AAM Ib" Encoding:"0xD4 ib"/"I"
{
ND_INS_AAM, ND_CAT_DECIMAL, ND_SET_I86, 2,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_CF|NDR_RFLAG_AF|NDR_RFLAG_OF,
0|NDR_RFLAG_CF|NDR_RFLAG_AF|NDR_RFLAG_OF,
{
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:3 Instruction:"AAS" Encoding:"0x3F"/""
{
ND_INS_AAS, ND_CAT_DECIMAL, ND_SET_I86, 3,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_AF,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:4 Instruction:"ADC Eb,Gb" Encoding:"0x10 /r"/"MR"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:5 Instruction:"ADC Ev,Gv" Encoding:"0x11 /r"/"MR"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:6 Instruction:"ADC Gb,Eb" Encoding:"0x12 /r"/"RM"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:7 Instruction:"ADC Gv,Ev" Encoding:"0x13 /r"/"RM"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:8 Instruction:"ADC AL,Ib" Encoding:"0x14 ib"/"I"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:9 Instruction:"ADC rAX,Iz" Encoding:"0x15 iz"/"I"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:10 Instruction:"ADC Eb,Ib" Encoding:"0x80 /2 ib"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:11 Instruction:"ADC Ev,Iz" Encoding:"0x81 /2 iz"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:12 Instruction:"ADC Eb,Ib" Encoding:"0x82 /2 iz"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:13 Instruction:"ADC Ev,Ib" Encoding:"0x83 /2 ib"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:14 Instruction:"ADCX Gy,Ey" Encoding:"0x66 0x0F 0x38 0xF6 /r"/"RM"
{
ND_INS_ADCX, ND_CAT_ARITH, ND_SET_ADX, 5,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_ADX,
0,
0|NDR_RFLAG_CF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:15 Instruction:"ADD Eb,Gb" Encoding:"0x00 /r"/"MR"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:16 Instruction:"ADD Ev,Gv" Encoding:"0x01 /r"/"MR"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:17 Instruction:"ADD Gb,Eb" Encoding:"0x02 /r"/"RM"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:18 Instruction:"ADD Gv,Ev" Encoding:"0x03 /r"/"RM"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:19 Instruction:"ADD AL,Ib" Encoding:"0x04 ib"/"I"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:20 Instruction:"ADD rAX,Iz" Encoding:"0x05 iz"/"I"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:21 Instruction:"ADD Eb,Ib" Encoding:"0x80 /0 ib"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:22 Instruction:"ADD Ev,Iz" Encoding:"0x81 /0 iz"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:23 Instruction:"ADD Eb,Ib" Encoding:"0x82 /0 iz"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:24 Instruction:"ADD Ev,Ib" Encoding:"0x83 /0 ib"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:25 Instruction:"ADDPD Vpd,Wpd" Encoding:"0x66 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDPD, ND_CAT_SSE, ND_SET_SSE2, 7,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:26 Instruction:"ADDPS Vps,Wps" Encoding:"NP 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDPS, ND_CAT_SSE, ND_SET_SSE, 8,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
},
},
// Pos:27 Instruction:"ADDSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDSD, ND_CAT_SSE, ND_SET_SSE2, 9,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_sd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:28 Instruction:"ADDSS Vss,Wss" Encoding:"0xF3 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDSS, ND_CAT_SSE, ND_SET_SSE, 10,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ss, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
},
},
// Pos:29 Instruction:"ADDSUBPD Vpd,Wpd" Encoding:"0x66 0x0F 0xD0 /r"/"RM"
{
ND_INS_ADDSUBPD, ND_CAT_SSE, ND_SET_SSE3, 11,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:30 Instruction:"ADDSUBPS Vps,Wps" Encoding:"0xF2 0x0F 0xD0 /r"/"RM"
{
ND_INS_ADDSUBPS, ND_CAT_SSE, ND_SET_SSE3, 12,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
},
},
// Pos:31 Instruction:"ADOX Gy,Ey" Encoding:"0xF3 0x0F 0x38 0xF6 /r"/"RM"
{
ND_INS_ADOX, ND_CAT_ARITH, ND_SET_ADX, 13,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_ADX,
0,
0|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:32 Instruction:"AESDEC Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDE /r"/"RM"
{
ND_INS_AESDEC, ND_CAT_AES, ND_SET_AES, 14,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
},
},
// Pos:33 Instruction:"AESDEC128KL Vdq,M384" Encoding:"0xF3 0x0F 0x38 0xDD /r:mem"/"RM"
{
ND_INS_AESDEC128KL, ND_CAT_AESKL, ND_SET_KL, 15,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_384, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:34 Instruction:"AESDEC256KL Vdq,M512" Encoding:"0xF3 0x0F 0x38 0xDF /r:mem"/"RM"
{
ND_INS_AESDEC256KL, ND_CAT_AESKL, ND_SET_KL, 16,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_512, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:35 Instruction:"AESDECLAST Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDF /r"/"RM"
{
ND_INS_AESDECLAST, ND_CAT_AES, ND_SET_AES, 17,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
},
},
// Pos:36 Instruction:"AESDECWIDE128KL M384" Encoding:"0xF3 0x0F 0x38 0xD8 /1:mem"/"M"
{
ND_INS_AESDECWIDE128KL, ND_CAT_WIDE_KL, ND_SET_KL, 18,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_M, ND_OPS_384, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_RW, 0, 8),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:37 Instruction:"AESDECWIDE256KL M512" Encoding:"0xF3 0x0F 0x38 0xD8 /3:mem"/"M"
{
ND_INS_AESDECWIDE256KL, ND_CAT_WIDE_KL, ND_SET_KL, 19,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_M, ND_OPS_512, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_RW, 0, 8),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:38 Instruction:"AESENC Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDC /r"/"RM"
{
ND_INS_AESENC, ND_CAT_AES, ND_SET_AES, 20,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
},
},
// Pos:39 Instruction:"AESENC128KL Vdq,M384" Encoding:"0xF3 0x0F 0x38 0xDC /r:mem"/"RM"
{
ND_INS_AESENC128KL, ND_CAT_AESKL, ND_SET_KL, 21,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_384, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:40 Instruction:"AESENC256KL Vdq,M512" Encoding:"0xF3 0x0F 0x38 0xDE /r:mem"/"RM"
{
ND_INS_AESENC256KL, ND_CAT_AESKL, ND_SET_KL, 22,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_512, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:41 Instruction:"AESENCLAST Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDD /r"/"RM"
{
ND_INS_AESENCLAST, ND_CAT_AES, ND_SET_AES, 23,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
},
},
// Pos:42 Instruction:"AESENCWIDE128KL M384" Encoding:"0xF3 0x0F 0x38 0xD8 /0:mem"/"M"
{
ND_INS_AESENCWIDE128KL, ND_CAT_WIDE_KL, ND_SET_KL, 24,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_M, ND_OPS_384, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_RW, 0, 8),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:43 Instruction:"AESENCWIDE256KL M512" Encoding:"0xF3 0x0F 0x38 0xD8 /2:mem"/"M"
{
ND_INS_AESENCWIDE256KL, ND_CAT_WIDE_KL, ND_SET_KL, 25,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_KL,
0,
0|NDR_RFLAG_ZF,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_M, ND_OPS_512, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_RW, 0, 8),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:44 Instruction:"AESIMC Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDB /r"/"RM"
{
ND_INS_AESIMC, ND_CAT_AES, ND_SET_AES, 26,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
},
},
// Pos:45 Instruction:"AESKEYGENASSIST Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0xDF /r ib"/"RMI"
{
ND_INS_AESKEYGENASSIST, ND_CAT_AES, ND_SET_AES, 27,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:46 Instruction:"ALTINST" Encoding:"0x0F 0x3F"/""
{
ND_INS_ALTINST, ND_CAT_SYSTEM, ND_SET_CYRIX, 28,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
0
},
},
// Pos:47 Instruction:"AND Eb,Gb" Encoding:"0x20 /r"/"MR"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:48 Instruction:"AND Ev,Gv" Encoding:"0x21 /r"/"MR"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:49 Instruction:"AND Gb,Eb" Encoding:"0x22 /r"/"RM"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:50 Instruction:"AND Gv,Ev" Encoding:"0x23 /r"/"RM"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:51 Instruction:"AND AL,Ib" Encoding:"0x24 ib"/"I"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_GPR_rAX, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:52 Instruction:"AND rAX,Iz" Encoding:"0x25 iz"/"I"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_GPR_rAX, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:53 Instruction:"AND Eb,Ib" Encoding:"0x80 /4 ib"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:54 Instruction:"AND Ev,Iz" Encoding:"0x81 /4 iz"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:55 Instruction:"AND Eb,Ib" Encoding:"0x82 /4 iz"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:56 Instruction:"AND Ev,Ib" Encoding:"0x83 /4 ib"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 29,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_AF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:57 Instruction:"ANDN Gy,By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF2 /r"/"RVM"
{
ND_INS_ANDN, ND_CAT_BMI1, ND_SET_BMI1, 30,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(3, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_PF|NDR_RFLAG_AF,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:58 Instruction:"ANDNPD Vpd,Wpd" Encoding:"0x66 0x0F 0x55 /r"/"RM"
{
ND_INS_ANDNPD, ND_CAT_LOGICAL_FP, ND_SET_SSE2, 31,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:59 Instruction:"ANDNPS Vps,Wps" Encoding:"NP 0x0F 0x55 /r"/"RM"
{
ND_INS_ANDNPS, ND_CAT_LOGICAL_FP, ND_SET_SSE, 32,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
},
},
// Pos:60 Instruction:"ANDPD Vpd,Wpd" Encoding:"0x66 0x0F 0x54 /r"/"RM"
{
ND_INS_ANDPD, ND_CAT_LOGICAL_FP, ND_SET_SSE2, 33,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:61 Instruction:"ANDPS Vps,Wps" Encoding:"NP 0x0F 0x54 /r"/"RM"
{
ND_INS_ANDPS, ND_CAT_LOGICAL_FP, ND_SET_SSE, 34,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
},
},
// Pos:62 Instruction:"ARPL Ew,Gw" Encoding:"0x63 /r"/"MR"
{
ND_INS_ARPL, ND_CAT_SYSTEM, ND_SET_I286PROT, 35,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_ZF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_w, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_w, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:63 Instruction:"BEXTR Gy,Ey,By" Encoding:"vex m:2 p:0 l:0 w:x 0xF7 /r"/"RMV"
{
ND_INS_BEXTR, ND_CAT_BMI1, ND_SET_BMI1, 36,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(3, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|NDR_RFLAG_ZF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF,
0|NDR_RFLAG_CF|NDR_RFLAG_OF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:64 Instruction:"BEXTR Gy,Ey,Id" Encoding:"xop m:A 0x10 /r id"/"RMI"
{
ND_INS_BEXTR, ND_CAT_BITBYTE, ND_SET_TBM, 36,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_d, 0, ND_OPA_R, 0, 0),
},
},
// Pos:65 Instruction:"BLCFILL By,Ey" Encoding:"xop m:9 0x01 /1"/"VM"
{
ND_INS_BLCFILL, ND_CAT_BITBYTE, ND_SET_TBM, 37,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:66 Instruction:"BLCI By,Ey" Encoding:"xop m:9 0x02 /6"/"VM"
{
ND_INS_BLCI, ND_CAT_BITBYTE, ND_SET_TBM, 38,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:67 Instruction:"BLCIC By,Ey" Encoding:"xop m:9 0x01 /5"/"VM"
{
ND_INS_BLCIC, ND_CAT_BITBYTE, ND_SET_TBM, 39,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:68 Instruction:"BLCMSK By,Ey" Encoding:"xop m:9 0x02 /1"/"VM"
{
ND_INS_BLCMSK, ND_CAT_BITBYTE, ND_SET_TBM, 40,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:69 Instruction:"BLCS By,Ey" Encoding:"xop m:9 0x01 /3"/"VM"
{
ND_INS_BLCS, ND_CAT_BITBYTE, ND_SET_TBM, 41,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:70 Instruction:"BLENDPD Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x0D /r ib"/"RMI"
{
ND_INS_BLENDPD, ND_CAT_SSE, ND_SET_SSE4, 42,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_x, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:71 Instruction:"BLENDPS Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x0C /r ib"/"RMI"
{
ND_INS_BLENDPS, ND_CAT_SSE, ND_SET_SSE4, 43,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_x, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:72 Instruction:"BLENDVPD Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0x15 /r"/"RM"
{
ND_INS_BLENDVPD, ND_CAT_SSE, ND_SET_SSE4, 44,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:73 Instruction:"BLENDVPS Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0x14 /r"/"RM"
{
ND_INS_BLENDVPS, ND_CAT_SSE, ND_SET_SSE4, 45,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:74 Instruction:"BLSFILL By,Ey" Encoding:"xop m:9 0x01 /2"/"VM"
{
ND_INS_BLSFILL, ND_CAT_BITBYTE, ND_SET_TBM, 46,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:75 Instruction:"BLSI By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF3 /3"/"VM"
{
ND_INS_BLSI, ND_CAT_BMI1, ND_SET_BMI1, 47,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF,
0|NDR_RFLAG_OF|NDR_RFLAG_PF|NDR_RFLAG_AF,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:76 Instruction:"BLSIC By,Ey" Encoding:"xop m:9 0x01 /6"/"VM"
{
ND_INS_BLSIC, ND_CAT_BITBYTE, ND_SET_TBM, 48,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:77 Instruction:"BLSMSK By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF3 /2"/"VM"
{
ND_INS_BLSMSK, ND_CAT_BMI1, ND_SET_BMI1, 49,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_SF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF,
0|NDR_RFLAG_ZF|NDR_RFLAG_OF|NDR_RFLAG_PF|NDR_RFLAG_AF,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:78 Instruction:"BLSR By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF3 /1"/"VM"
{
ND_INS_BLSR, ND_CAT_BMI1, ND_SET_BMI1, 50,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(2, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF,
0|NDR_RFLAG_OF|NDR_RFLAG_PF|NDR_RFLAG_AF,
{
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:79 Instruction:"BNDCL rBl,Ey" Encoding:"mpx 0xF3 0x0F 0x1A /r"/"RM"
{
ND_INS_BNDCL, ND_CAT_MPX, ND_SET_MPX, 51,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_F64|ND_FLAG_I67|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:80 Instruction:"BNDCN rBl,Ey" Encoding:"mpx 0xF2 0x0F 0x1B /r"/"RM"
{
ND_INS_BNDCN, ND_CAT_MPX, ND_SET_MPX, 52,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_F64|ND_FLAG_I67|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:81 Instruction:"BNDCU rBl,Ey" Encoding:"mpx 0xF2 0x0F 0x1A /r"/"RM"
{
ND_INS_BNDCU, ND_CAT_MPX, ND_SET_MPX, 53,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_F64|ND_FLAG_I67|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:82 Instruction:"BNDLDX rBl,Mmib" Encoding:"mpx 0x0F 0x1A /r:mem mib"/"RM"
{
ND_INS_BNDLDX, ND_CAT_MPX, ND_SET_MPX, 54,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_NOA16|ND_FLAG_NO_RIP_REL|ND_FLAG_I67|ND_FLAG_MODRM|ND_FLAG_MIB, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_M, ND_OPS_mib, 0, ND_OPA_R, 0, 0),
},
},
// Pos:83 Instruction:"BNDMK rBl,My" Encoding:"mpx 0xF3 0x0F 0x1B /r:mem"/"RM"
{
ND_INS_BNDMK, ND_CAT_MPX, ND_SET_MPX, 55,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_NOA16|ND_FLAG_NO_RIP_REL|ND_FLAG_I67|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_M, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:84 Instruction:"BNDMOV rBl,mBl" Encoding:"mpx 0x66 0x0F 0x1A /r"/"RM"
{
ND_INS_BNDMOV, ND_CAT_MPX, ND_SET_MPX, 56,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_NOA16|ND_FLAG_I67|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_mB, ND_OPS_l, 0, ND_OPA_R, 0, 0),
},
},
// Pos:85 Instruction:"BNDMOV mBl,rBl" Encoding:"mpx 0x66 0x0F 0x1B /r"/"MR"
{
ND_INS_BNDMOV, ND_CAT_MPX, ND_SET_MPX, 56,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_NOA16|ND_FLAG_I67|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_mB, ND_OPS_l, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_R, 0, 0),
},
},
// Pos:86 Instruction:"BNDSTX Mmib,rBl" Encoding:"mpx 0x0F 0x1B /r:mem mib"/"MR"
{
ND_INS_BNDSTX, ND_CAT_MPX, ND_SET_MPX, 57,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_NOA16|ND_FLAG_NO_RIP_REL|ND_FLAG_I67|ND_FLAG_MODRM|ND_FLAG_MIB, ND_CFF_MPX,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_mib, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_rB, ND_OPS_l, 0, ND_OPA_R, 0, 0),
},
},
// Pos:87 Instruction:"BOUND Gv,Ma" Encoding:"0x62 /r:mem"/"RM"
{
ND_INS_BOUND, ND_CAT_INTERRUPT, ND_SET_I186, 58,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_M, ND_OPS_a, 0, ND_OPA_R, 0, 0),
},
},
// Pos:88 Instruction:"BSF Gv,Ev" Encoding:"0x0F 0xBC /r"/"RM"
{
ND_INS_BSF, ND_CAT_I386, ND_SET_I386, 59,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_ZF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:89 Instruction:"BSR Gv,Ev" Encoding:"0x0F 0xBD /r"/"RM"
{
ND_INS_BSR, ND_CAT_BITBYTE, ND_SET_I386, 60,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_ZF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:90 Instruction:"BSWAP Zv" Encoding:"0x0F 0xC8"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:91 Instruction:"BSWAP Zv" Encoding:"0x0F 0xC9"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:92 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCA"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:93 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCB"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:94 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCC"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:95 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCD"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:96 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCE"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:97 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCF"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 61,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
},
},
// Pos:98 Instruction:"BT Ev,Gv" Encoding:"0x0F 0xA3 /r bitbase"/"MR"
{
ND_INS_BT, ND_CAT_BITBYTE, ND_SET_I386, 62,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:99 Instruction:"BT Ev,Ib" Encoding:"0x0F 0xBA /4 ib"/"MI"
{
ND_INS_BT, ND_CAT_BITBYTE, ND_SET_I386, 62,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:100 Instruction:"BTC Ev,Ib" Encoding:"0x0F 0xBA /7 ib"/"MI"
{
ND_INS_BTC, ND_CAT_BITBYTE, ND_SET_I386, 63,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:101 Instruction:"BTC Ev,Gv" Encoding:"0x0F 0xBB /r bitbase"/"MR"
{
ND_INS_BTC, ND_CAT_I386, ND_SET_I386, 63,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:102 Instruction:"BTR Ev,Gv" Encoding:"0x0F 0xB3 /r bitbase"/"MR"
{
ND_INS_BTR, ND_CAT_BITBYTE, ND_SET_I386, 64,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:103 Instruction:"BTR Ev,Ib" Encoding:"0x0F 0xBA /6 ib"/"MI"
{
ND_INS_BTR, ND_CAT_BITBYTE, ND_SET_I386, 64,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:104 Instruction:"BTS Ev,Gv" Encoding:"0x0F 0xAB /r bitbase"/"MR"
{
ND_INS_BTS, ND_CAT_BITBYTE, ND_SET_I386, 65,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:105 Instruction:"BTS Ev,Ib" Encoding:"0x0F 0xBA /5 ib"/"MI"
{
ND_INS_BTS, ND_CAT_BITBYTE, ND_SET_I386, 65,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:106 Instruction:"BZHI Gy,Ey,By" Encoding:"vex m:2 p:0 l:0 w:x 0xF5 /r"/"RMV"
{
ND_INS_BZHI, ND_CAT_BMI2, ND_SET_BMI2, 66,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(3, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_PF|NDR_RFLAG_AF,
0|NDR_RFLAG_OF|NDR_RFLAG_PF|NDR_RFLAG_AF,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_B, ND_OPS_y, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:107 Instruction:"CALL Jz" Encoding:"0xE8 cz"/"D"
{
ND_INS_CALLNR, ND_CAT_CALL, ND_SET_I86, 67,
ND_PREF_BND,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
{
OP(ND_OPT_J, ND_OPS_z, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:108 Instruction:"CALL Ev" Encoding:"0xFF /2"/"M"
{
ND_INS_CALLNI, ND_CAT_CALL, ND_SET_I86, 67,
ND_PREF_BND|ND_PREF_DNT,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_CETT|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:109 Instruction:"CALLF Ap" Encoding:"0x9A cp"/"D"
{
ND_INS_CALLFD, ND_CAT_CALL, ND_SET_I86, 68,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
{
OP(ND_OPT_A, ND_OPS_p, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v2, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v2, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:110 Instruction:"CALLF Mp" Encoding:"0xFF /3:mem"/"M"
{
ND_INS_CALLFI, ND_CAT_CALL, ND_SET_I86, 68,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_CETT|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_p, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v2, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v2, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:111 Instruction:"CBW" Encoding:"ds16 0x98"/""
{
ND_INS_CBW, ND_CAT_CONVERT, ND_SET_I386, 69,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:112 Instruction:"CDQ" Encoding:"ds32 0x99"/""
{
ND_INS_CDQ, ND_CAT_CONVERT, ND_SET_I386, 70,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:113 Instruction:"CDQE" Encoding:"ds64 0x98"/""
{
ND_INS_CDQE, ND_CAT_CONVERT, ND_SET_I386, 71,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:114 Instruction:"CLAC" Encoding:"NP 0x0F 0x01 /0xCA"/""
{
ND_INS_CLAC, ND_CAT_SMAP, ND_SET_SMAP, 72,
0,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SMAP,
0,
0,
0,
0|NDR_RFLAG_AC,
{
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:115 Instruction:"CLC" Encoding:"0xF8"/""
{
ND_INS_CLC, ND_CAT_FLAGOP, ND_SET_I86, 73,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0|NDR_RFLAG_CF,
{
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:116 Instruction:"CLD" Encoding:"0xFC"/""
{
ND_INS_CLD, ND_CAT_FLAGOP, ND_SET_I86, 74,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0|NDR_RFLAG_DF,
{
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:117 Instruction:"CLDEMOTE Mb" Encoding:"cldm NP 0x0F 0x1C /0:mem"/"M"
{
ND_INS_CLDEMOTE, ND_CAT_CLDEMOTE, ND_SET_CLDEMOTE, 75,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLDEMOTE,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_b, 0, ND_OPA_P, 0, 0),
},
},
// Pos:118 Instruction:"CLEVICT0 M?" Encoding:"vex m:1 p:3 0xAE /7:mem"/"M"
{
ND_INS_CLEVICT0, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 76,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_unknown, 0, ND_OPA_N, 0, 0),
},
},
// Pos:119 Instruction:"CLEVICT1 M?" Encoding:"vex m:1 p:2 0xAE /7:mem"/"M"
{
ND_INS_CLEVICT1, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 77,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_unknown, 0, ND_OPA_N, 0, 0),
},
},
// Pos:120 Instruction:"CLFLUSH Mb" Encoding:"NP 0x0F 0xAE /7:mem"/"M"
{
ND_INS_CLFLUSH, ND_CAT_MISC, ND_SET_CLFSH, 78,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLFSH,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:121 Instruction:"CLFLUSHOPT Mb" Encoding:"0x66 0x0F 0xAE /7:mem"/"M"
{
ND_INS_CLFLUSHOPT, ND_CAT_MISC, ND_SET_CLFSHOPT, 79,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLFSHOPT,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:122 Instruction:"CLGI" Encoding:"0x0F 0x01 /0xDD"/""
{
ND_INS_CLGI, ND_CAT_SYSTEM, ND_SET_SVM, 80,
0,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXR_SEAM|ND_MOD_SGX_OFF|ND_MOD_TSX_OFF|ND_MOD_SMM_OFF,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
{
0
},
},
// Pos:123 Instruction:"CLI" Encoding:"0xFA"/""
{
ND_INS_CLI, ND_CAT_FLAGOP, ND_SET_I86, 81,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0|NDR_RFLAG_IF,
{
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:124 Instruction:"CLRSSBSY Mq" Encoding:"0xF3 0x0F 0xAE /6:mem"/"M"
{
ND_INS_CLRSSBSY, ND_CAT_CET, ND_SET_CET_SS, 82,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET_SS,
0,
0|NDR_RFLAG_CF,
0,
0|NDR_RFLAG_ZF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_OF|NDR_RFLAG_SF,
{
OP(ND_OPT_M, ND_OPS_q, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:125 Instruction:"CLTS" Encoding:"0x0F 0x06"/""
{
ND_INS_CLTS, ND_CAT_SYSTEM, ND_SET_I286REAL, 83,
0,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_CR_0, ND_OPS_yf, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:126 Instruction:"CLUI" Encoding:"0xF3 0x0F 0x01 /0xEE"/""
{
ND_INS_CLUI, ND_CAT_UINTR, ND_SET_UINTR, 84,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_UINTR,
0,
0,
0,
0,
{
OP(ND_OPT_UIF, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:127 Instruction:"CLWB Mb" Encoding:"0x66 0x0F 0xAE /6:mem"/"M"
{
ND_INS_CLWB, ND_CAT_MISC, ND_SET_CLWB, 85,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLWB,
0,
0,
0,
0,
{
OP(ND_OPT_M, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:128 Instruction:"CLZERO" Encoding:"0x0F 0x01 /0xFC"/""
{
ND_INS_CLZERO, ND_CAT_MISC, ND_SET_CLZERO, 86,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:129 Instruction:"CMC" Encoding:"0xF5"/""
{
ND_INS_CMC, ND_CAT_FLAGOP, ND_SET_I86, 87,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|NDR_RFLAG_CF,
0,
0,
{
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:130 Instruction:"CMOVBE Gv,Ev" Encoding:"0x0F 0x46 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 88,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_CF|NDR_RFLAG_ZF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:131 Instruction:"CMOVC Gv,Ev" Encoding:"0x0F 0x42 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 89,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_CF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:132 Instruction:"CMOVL Gv,Ev" Encoding:"0x0F 0x4C /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 90,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:133 Instruction:"CMOVLE Gv,Ev" Encoding:"0x0F 0x4E /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 91,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_SF|NDR_RFLAG_ZF|NDR_RFLAG_OF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:134 Instruction:"CMOVNBE Gv,Ev" Encoding:"0x0F 0x47 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 92,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_CF|NDR_RFLAG_ZF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:135 Instruction:"CMOVNC Gv,Ev" Encoding:"0x0F 0x43 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 93,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_CF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:136 Instruction:"CMOVNL Gv,Ev" Encoding:"0x0F 0x4D /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 94,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:137 Instruction:"CMOVNLE Gv,Ev" Encoding:"0x0F 0x4F /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 95,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_SF|NDR_RFLAG_ZF|NDR_RFLAG_OF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:138 Instruction:"CMOVNO Gv,Ev" Encoding:"0x0F 0x41 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 96,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_OF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:139 Instruction:"CMOVNP Gv,Ev" Encoding:"0x0F 0x4B /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 97,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_PF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:140 Instruction:"CMOVNS Gv,Ev" Encoding:"0x0F 0x49 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 98,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_SF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:141 Instruction:"CMOVNZ Gv,Ev" Encoding:"0x0F 0x45 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 99,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_ZF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:142 Instruction:"CMOVO Gv,Ev" Encoding:"0x0F 0x40 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 100,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_OF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:143 Instruction:"CMOVP Gv,Ev" Encoding:"0x0F 0x4A /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 101,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_PF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:144 Instruction:"CMOVS Gv,Ev" Encoding:"0x0F 0x48 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 102,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_SF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:145 Instruction:"CMOVZ Gv,Ev" Encoding:"0x0F 0x44 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 103,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|NDR_RFLAG_ZF,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:146 Instruction:"CMP Eb,Gb" Encoding:"0x38 /r"/"MR"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:147 Instruction:"CMP Ev,Gv" Encoding:"0x39 /r"/"MR"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:148 Instruction:"CMP Gb,Eb" Encoding:"0x3A /r"/"RM"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:149 Instruction:"CMP Gv,Ev" Encoding:"0x3B /r"/"RM"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:150 Instruction:"CMP AL,Ib" Encoding:"0x3C ib"/"I"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:151 Instruction:"CMP rAX,Iz" Encoding:"0x3D iz"/"I"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:152 Instruction:"CMP Eb,Ib" Encoding:"0x80 /7 ib"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:153 Instruction:"CMP Ev,Iz" Encoding:"0x81 /7 iz"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:154 Instruction:"CMP Eb,Ib" Encoding:"0x82 /7 iz"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:155 Instruction:"CMP Ev,Ib" Encoding:"0x83 /7 ib"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 104,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:156 Instruction:"CMPPD Vpd,Wpd,Ib" Encoding:"0x66 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPPD, ND_CAT_SSE, ND_SET_SSE2, 105,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:157 Instruction:"CMPPS Vps,Wps,Ib" Encoding:"NP 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPPS, ND_CAT_SSE, ND_SET_SSE, 106,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:158 Instruction:"CMPSB Xb,Yb" Encoding:"0xA6"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 107,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:159 Instruction:"CMPSB Xb,Yb" Encoding:"rep 0xA6"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 107,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_ZF|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:160 Instruction:"CMPSD Vsd,Wsd,Ib" Encoding:"0xF2 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPSD, ND_CAT_SSE, ND_SET_SSE2, 108,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_sd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:161 Instruction:"CMPSD Xv,Yv" Encoding:"ds32 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 108,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:162 Instruction:"CMPSD Xv,Yv" Encoding:"rep ds32 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 108,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_ZF|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:163 Instruction:"CMPSQ Xv,Yv" Encoding:"ds64 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 109,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:164 Instruction:"CMPSQ Xv,Yv" Encoding:"rep ds64 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 109,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_ZF|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:165 Instruction:"CMPSS Vss,Wss,Ib" Encoding:"0xF3 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPSS, ND_CAT_SSE, ND_SET_SSE, 110,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ss, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:166 Instruction:"CMPSW Xv,Yv" Encoding:"ds16 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 111,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:167 Instruction:"CMPSW Xv,Yv" Encoding:"rep ds16 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 111,
ND_PREF_REPC,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|NDR_RFLAG_ZF|NDR_RFLAG_DF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:168 Instruction:"CMPXCHG Eb,Gb" Encoding:"0x0F 0xB0 /r"/"MR"
{
ND_INS_CMPXCHG, ND_CAT_SEMAPHORE, ND_SET_I486REAL, 112,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:169 Instruction:"CMPXCHG Ev,Gv" Encoding:"0x0F 0xB1 /r"/"MR"
{
ND_INS_CMPXCHG, ND_CAT_SEMAPHORE, ND_SET_I486REAL, 112,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:170 Instruction:"CMPXCHG16B Mdq" Encoding:"rexw 0x0F 0xC7 /1:mem"/"M"
{
ND_INS_CMPXCHG16B, ND_CAT_SEMAPHORE, ND_SET_CMPXCHG16B, 113,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CX8,
0,
0|NDR_RFLAG_ZF,
0,
0,
{
OP(ND_OPT_M, ND_OPS_dq, 0, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:171 Instruction:"CMPXCHG8B Mq" Encoding:"0x0F 0xC7 /1:mem"/"M"
{
ND_INS_CMPXCHG8B, ND_CAT_SEMAPHORE, ND_SET_PENTIUMREAL, 114,
ND_PREF_LOCK|ND_PREF_HLE,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CX8,
0,
0|NDR_RFLAG_ZF,
0,
0,
{
OP(ND_OPT_M, ND_OPS_q, 0, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_RCW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:172 Instruction:"COMISD Vsd,Wsd" Encoding:"0x66 0x0F 0x2F /r"/"RM"
{
ND_INS_COMISD, ND_CAT_SSE2, ND_SET_SSE2, 115,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_ZF,
0,
0,
{
OP(ND_OPT_V, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:173 Instruction:"COMISS Vss,Wss" Encoding:"NP 0x0F 0x2F /r"/"RM"
{
ND_INS_COMISS, ND_CAT_SSE, ND_SET_SSE, 116,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_ZF,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:174 Instruction:"CPUID" Encoding:"0x0F 0xA2"/""
{
ND_INS_CPUID, ND_CAT_MISC, ND_SET_I486REAL, 117,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:175 Instruction:"CPU_READ" Encoding:"0x0F 0x3D"/""
{
ND_INS_CPU_READ, ND_CAT_SYSTEM, ND_SET_CYRIX, 118,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
0
},
},
// Pos:176 Instruction:"CPU_WRITE" Encoding:"0x0F 0x3C"/""
{
ND_INS_CPU_WRITE, ND_CAT_SYSTEM, ND_SET_CYRIX, 119,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
0
},
},
// Pos:177 Instruction:"CQO" Encoding:"ds64 0x99"/""
{
ND_INS_CQO, ND_CAT_CONVERT, ND_SET_I386, 120,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:178 Instruction:"CRC32 Gy,Eb" Encoding:"0xF2 0x0F 0x38 0xF0 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 121,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:179 Instruction:"CRC32 Gy,Eb" Encoding:"0x66 0xF2 0x0F 0x38 0xF0 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 121,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:180 Instruction:"CRC32 Gy,Ev" Encoding:"0xF2 0x0F 0x38 0xF1 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 121,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
},
},
// Pos:181 Instruction:"CRC32 Gy,Ev" Encoding:"0x66 0xF2 0x0F 0x38 0xF1 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 121,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
},
},
// Pos:182 Instruction:"CVTDQ2PD Vx,Wq" Encoding:"0xF3 0x0F 0xE6 /r"/"RM"
{
ND_INS_CVTDQ2PD, ND_CAT_CONVERT, ND_SET_SSE2, 122,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_x, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, 0, ND_OPA_R, 0, 0),
},
},
// Pos:183 Instruction:"CVTDQ2PS Vps,Wdq" Encoding:"NP 0x0F 0x5B /r"/"RM"
{
ND_INS_CVTDQ2PS, ND_CAT_CONVERT, ND_SET_SSE2, 123,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
},
},
// Pos:184 Instruction:"CVTPD2DQ Vx,Wpd" Encoding:"0xF2 0x0F 0xE6 /r"/"RM"
{
ND_INS_CVTPD2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 124,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_x, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:185 Instruction:"CVTPD2PI Pq,Wpd" Encoding:"0x66 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTPD2PI, ND_CAT_CONVERT, ND_SET_SSE2, 125,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_P, ND_OPS_q, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:186 Instruction:"CVTPD2PS Vps,Wpd" Encoding:"0x66 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTPD2PS, ND_CAT_CONVERT, ND_SET_SSE2, 126,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:187 Instruction:"CVTPI2PD Vpd,Qq" Encoding:"0x66 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTPI2PD, ND_CAT_CONVERT, ND_SET_SSE2, 127,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, 0, ND_OPA_R, 0, 0),
},
},
// Pos:188 Instruction:"CVTPI2PS Vq,Qq" Encoding:"NP 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTPI2PS, ND_CAT_CONVERT, ND_SET_SSE, 128,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_q, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, 0, ND_OPA_R, 0, 0),
},
},
// Pos:189 Instruction:"CVTPS2DQ Vdq,Wps" Encoding:"0x66 0x0F 0x5B /r"/"RM"
{
ND_INS_CVTPS2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 129,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
},
},
// Pos:190 Instruction:"CVTPS2PD Vpd,Wq" Encoding:"NP 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTPS2PD, ND_CAT_CONVERT, ND_SET_SSE2, 130,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, 0, ND_OPA_R, 0, 0),
},
},
// Pos:191 Instruction:"CVTPS2PI Pq,Wq" Encoding:"NP 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTPS2PI, ND_CAT_CONVERT, ND_SET_SSE, 131,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_P, ND_OPS_q, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, 0, ND_OPA_R, 0, 0),
},
},
// Pos:192 Instruction:"CVTSD2SI Gy,Wsd" Encoding:"0xF2 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTSD2SI, ND_CAT_CONVERT, ND_SET_SSE2, 132,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:193 Instruction:"CVTSD2SS Vss,Wsd" Encoding:"0xF2 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTSD2SS, ND_CAT_CONVERT, ND_SET_SSE2, 133,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ss, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:194 Instruction:"CVTSI2SD Vsd,Ey" Encoding:"0xF2 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTSI2SD, ND_CAT_CONVERT, ND_SET_SSE2, 134,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_sd, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:195 Instruction:"CVTSI2SS Vss,Ey" Encoding:"0xF3 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTSI2SS, ND_CAT_CONVERT, ND_SET_SSE, 135,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ss, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:196 Instruction:"CVTSS2SD Vsd,Wss" Encoding:"0xF3 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTSS2SD, ND_CAT_CONVERT, ND_SET_SSE2, 136,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_sd, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
},
},
// Pos:197 Instruction:"CVTSS2SI Gy,Wss" Encoding:"0xF3 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTSS2SI, ND_CAT_CONVERT, ND_SET_SSE, 137,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
},
},
// Pos:198 Instruction:"CVTTPD2DQ Vx,Wpd" Encoding:"0x66 0x0F 0xE6 /r"/"RM"
{
ND_INS_CVTTPD2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 138,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_x, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:199 Instruction:"CVTTPD2PI Pq,Wpd" Encoding:"0x66 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTPD2PI, ND_CAT_CONVERT, ND_SET_SSE2, 139,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_P, ND_OPS_q, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:200 Instruction:"CVTTPS2DQ Vdq,Wps" Encoding:"0xF3 0x0F 0x5B /r"/"RM"
{
ND_INS_CVTTPS2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 140,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
},
},
// Pos:201 Instruction:"CVTTPS2PI Pq,Wq" Encoding:"NP 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTPS2PI, ND_CAT_CONVERT, ND_SET_SSE, 141,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_P, ND_OPS_q, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, 0, ND_OPA_R, 0, 0),
},
},
// Pos:202 Instruction:"CVTTSD2SI Gy,Wsd" Encoding:"0xF2 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTSD2SI, ND_CAT_CONVERT, ND_SET_SSE2, 142,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:203 Instruction:"CVTTSS2SI Gy,Wss" Encoding:"0xF3 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTSS2SI, ND_CAT_CONVERT, ND_SET_SSE, 143,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_G, ND_OPS_y, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
},
},
// Pos:204 Instruction:"CWD" Encoding:"ds16 0x99"/""
{
ND_INS_CWD, ND_CAT_CONVERT, ND_SET_I386, 144,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:205 Instruction:"CWDE" Encoding:"ds32 0x98"/""
{
ND_INS_CWDE, ND_CAT_CONVERT, ND_SET_I386, 145,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
},
},
// Pos:206 Instruction:"DAA" Encoding:"0x27"/""
{
ND_INS_DAA, ND_CAT_DECIMAL, ND_SET_I86, 146,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|NDR_RFLAG_CF|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF,
0|NDR_RFLAG_OF,
0|NDR_RFLAG_OF,
{
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:207 Instruction:"DAS" Encoding:"0x2F"/""
{
ND_INS_DAS, ND_CAT_DECIMAL, ND_SET_I86, 147,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|NDR_RFLAG_CF|NDR_RFLAG_AF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF,
0|NDR_RFLAG_OF,
0|NDR_RFLAG_OF,
{
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
},
},
// Pos:208 Instruction:"DEC Zv" Encoding:"0x48"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:209 Instruction:"DEC Zv" Encoding:"0x49"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:210 Instruction:"DEC Zv" Encoding:"0x4A"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:211 Instruction:"DEC Zv" Encoding:"0x4B"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:212 Instruction:"DEC Zv" Encoding:"0x4C"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:213 Instruction:"DEC Zv" Encoding:"0x4D"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:214 Instruction:"DEC Zv" Encoding:"0x4E"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:215 Instruction:"DEC Zv" Encoding:"0x4F"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_Z, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:216 Instruction:"DEC Eb" Encoding:"0xFE /1"/"M"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:217 Instruction:"DEC Ev" Encoding:"0xFF /1"/"M"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 148,
ND_PREF_HLE|ND_PREF_LOCK,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0,
0,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:218 Instruction:"DELAY Ry" Encoding:"vex m:1 p:2 0xAE /6:reg"/"M"
{
ND_INS_DELAY, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 149,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF,
0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
{
OP(ND_OPT_R, ND_OPS_y, 0, ND_OPA_R, 0, 0),
},
},
// Pos:219 Instruction:"DIV Eb" Encoding:"0xF6 /6"/"M"
{
ND_INS_DIV, ND_CAT_ARITH, ND_SET_I86, 150,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_b, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:220 Instruction:"DIV Ev" Encoding:"0xF7 /6"/"M"
{
ND_INS_DIV, ND_CAT_ARITH, ND_SET_I86, 150,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:221 Instruction:"DIVPD Vpd,Wpd" Encoding:"0x66 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVPD, ND_CAT_SSE, ND_SET_SSE2, 151,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_pd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:222 Instruction:"DIVPS Vps,Wps" Encoding:"NP 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVPS, ND_CAT_SSE, ND_SET_SSE, 152,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ps, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, 0, ND_OPA_R, 0, 0),
},
},
// Pos:223 Instruction:"DIVSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVSD, ND_CAT_SSE, ND_SET_SSE2, 153,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_sd, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, 0, ND_OPA_R, 0, 0),
},
},
// Pos:224 Instruction:"DIVSS Vss,Wss" Encoding:"0xF3 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVSS, ND_CAT_SSE, ND_SET_SSE, 154,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_ss, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, 0, ND_OPA_R, 0, 0),
},
},
// Pos:225 Instruction:"DMINT" Encoding:"0x0F 0x39"/""
{
ND_INS_DMINT, ND_CAT_SYSTEM, ND_SET_CYRIX, 155,
0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
{
0
},
},
// Pos:226 Instruction:"DPPD Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x41 /r ib"/"RMI"
{
ND_INS_DPPD, ND_CAT_SSE, ND_SET_SSE4, 156,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_dq, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:227 Instruction:"DPPS Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x40 /r ib"/"RMI"
{
ND_INS_DPPS, ND_CAT_SSE, ND_SET_SSE4, 157,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
{
OP(ND_OPT_V, ND_OPS_x, 0, ND_OPA_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, 0, ND_OPA_R, 0, 0),
},
},
// Pos:228 Instruction:"EMMS" Encoding:"NP 0x0F 0x77"/""
{
ND_INS_EMMS, ND_CAT_MMX, ND_SET_MMX, 158,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, ND_CFF_MMX,
0,
0,
0,
0,
{
0
},
},
// Pos:229 Instruction:"ENCLS" Encoding:"NP 0x0F 0x01 /0xCF"/""
{
ND_INS_ENCLS, ND_CAT_SGX, ND_SET_SGX, 159,
0,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SGX,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
},
},
// Pos:230 Instruction:"ENCLU" Encoding:"NP 0x0F 0x01 /0xD7"/""
{
ND_INS_ENCLU, ND_CAT_SGX, ND_SET_SGX, 160,
0,
ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM_OFF|ND_MOD_SGX|ND_MOD_SGX_OFF|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SGX,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
},
},
// Pos:231 Instruction:"ENCLV" Encoding:"NP 0x0F 0x01 /0xC0"/""
{
ND_INS_ENCLV, ND_CAT_SGX, ND_SET_SGX, 161,
0,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX_OFF,
0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SGX,
0,
0,
0,
0,
{
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT, ND_OPA_CRW, 0, 0),
},
},
// Pos:232 Instruction:"ENCODEKEY128 Gd,Rd" Encoding:"0xF3 0x0F 0x38 0xFA /r:reg"/"RM"
{
ND_INS_ENCODEKEY128, ND_CAT_AESKL, ND_SET_KL, 162,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_KL,
0,
0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_G, ND_OPS_d, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_R, ND_OPS_d, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_W, 0, 3),
OP(ND_OPT_SSE_XMM4, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_W, 0, 3),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:233 Instruction:"ENCODEKEY256 Gd,Rd" Encoding:"0xF3 0x0F 0x38 0xFB /r:reg"/"RM"
{
ND_INS_ENCODEKEY256, ND_CAT_AESKL, ND_SET_KL, 163,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_KL,
0,
0,
0,
0|NDR_RFLAG_CF|NDR_RFLAG_PF|NDR_RFLAG_AF|NDR_RFLAG_ZF|NDR_RFLAG_SF|NDR_RFLAG_OF,
{
OP(ND_OPT_G, ND_OPS_d, 0, ND_OPA_W, 0, 0),
OP(ND_OPT_R, ND_OPS_d, 0, ND_OPA_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_RW, 0, 2),
OP(ND_OPT_SSE_XMM2, ND_OPS_dq, ND_OPF_DEFAULT, ND_OPA_W, 0, 5),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT, ND_OPA_W, 0, 0),
},
},
// Pos:234 Instruction:"ENDBR32" Encoding:"cet a0xF3 0x0F 0x1E /0xFB"/""
{
ND_INS_ENDBR, ND_CAT_CET, ND_SET_CET_IBT, 164,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET_IBT,
0,
0,
0,
0,
{
0
},
},
// Pos:235 Instruction:"ENDBR64" Encoding:"cet a0xF3 0x0F 0x1E /0xFA"/""
{
ND_INS_ENDBR, ND_CAT_CET, ND_SET_CET_IBT, 165,
0,
ND_MOD_ANY,
0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET_IBT,
0,
0,
0,
0,
{
0
},
},
// Pos:236 Instruction:"ENQCMD rM?,Moq" Encoding:"0xF2 0x0F 0x38 0xF8 /r:mem"/"M"