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cpuid.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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flags.dat
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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2020-10-05 13:19:03 +03:00 |
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modes.dat
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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prefixes.dat
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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table_0F_3A.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_0F_38.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_0F.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_3dnow.dat
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Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37.
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2021-01-11 11:10:04 +02:00 |
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table_base.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_evex1.dat
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
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table_evex2.dat
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
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table_evex3.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_evex5.dat
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
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table_evex6.dat
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Multiple changes
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2021-07-08 12:40:39 +03:00 |
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table_fpu.dat
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Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37.
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2021-01-11 11:10:04 +02:00 |
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table_vex1.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_vex2.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_vex3.dat
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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2022-10-04 12:22:59 +03:00 |
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table_xop.dat
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Fixed RET with immediate - the immediate is not sign-extended.
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2020-07-23 14:08:01 +03:00 |
9ba1e6a2f9