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Andrei Vlad LUTAS
f53cbc51e2
Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2 months ago |
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bddisasm.h
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
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1 year ago |
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bdshemu.h
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Make sure all flags are set for CMPXCHG (this was left intentionally incomplete).
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1 year ago |
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constants.h
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Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2 months ago |
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cpuidflags.h
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Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2 months ago |
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disasmstatus.h
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Switched to internally defined types.
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2 years ago |
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disasmtypes.h
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Switched to internally defined types.
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2 years ago |
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registers.h
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Renamed REG_* fields to NDR_*, so that we don't conflict with _GNU_SOURCES.
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3 years ago |
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version.h
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Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2 months ago |
