3 Commits

Author	SHA1	Message	Date
Andrei Vlad LUTAS	76d92e73c2	Multiple changes ... - Add support for AVX512-FP16 instructions, as per https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html - Bug fix: zeroing with no masking is not supported, so return an error if we encounter such encodings - Bug fix: ignore VEX/EVEX.W field outside 64 bit mode for some instructions - Several other minor fixes and improvements	2021-07-08 12:40:39 +03:00
Andrei Vlad LUTAS	33078e4670	Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.	2020-09-10 11:06:20 +03:00
Andrei Vlad LUTAS	698ba367a1	Initial commit.	2020-07-21 11:19:18 +03:00