BITDEFENDER\vlutas
|
9c6b5429c9
|
Fixed pybddisasm version.
|
2022-08-01 14:17:07 +03:00 |
|
BITDEFENDER\vlutas
|
bf81c647e3
|
Make sure all flags are set for CMPXCHG (this was left intentionally incomplete).
Make sure we clear upper bits of the 256/512 bit SSE register.
|
2022-07-19 11:03:17 +03:00 |
|
BITDEFENDER\vlutas
|
6dda2c122c
|
Make sure upper 32 bit of a CMOV destination register is cleared to 0 even if the condition is not satisfied
|
2022-07-16 12:21:46 +03:00 |
|
BITDEFENDER\vlutas
|
1805a9edec
|
Fixed flag setting for ADC, SBB, SAR and IMUL instructions.
|
2022-07-14 13:42:37 +03:00 |
|
BITDEFENDER\vlutas
|
fe6a937f51
|
Switched to internally defined types.
WRUSSD and WRUSSQ cannot be executed when CPL != 0.
|
2022-01-05 14:03:13 +02:00 |
|
BITDEFENDER\vlutas
|
63e3ee22a9
|
Fixed High8 handling in NdGetFullAccessMap.
|
2022-01-03 12:25:35 +02:00 |
|
BITDEFENDER\vlutas
|
2f50ce9b4e
|
Improved REG_ID macros - make sure we include block addressing and High8 designator in the reg ID. Alsom, make sure the register size fits in, since the new tile register can be 1K in size, which previously overflowed...
|
2021-12-03 12:44:57 +02:00 |
|
BITDEFENDER\vlutas
|
7572adaeba
|
Fixed INSTRUX size in setup.py.
|
2021-11-02 11:34:17 +02:00 |
|
BITDEFENDER\vlutas
|
433e723e07
|
Implemented a reverse oprand lookup table. It holds pointers to relevant operands inside INSTRUX, for quick lookup.
Moved helper functions in bdhelpers.c.
Added a dedicated BranchInfo field inside INSTRUX, containing the most relevant branch information.
|
2021-11-02 11:22:22 +02:00 |
|
Ionel-Cristinel ANICHITEI
|
af3d23e3ff
|
Move pybddisasm to the bindings directory
|
2021-10-20 09:32:50 +03:00 |
|