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348 Commits 3 Branches 16 Tags 8.6 MiB
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9 Commits

Author SHA1 Message Date
Andrei Vlad LUTAS
767bf2e5c0 Added support for new Intel AVX 10.2 instructions. 
Added support for AMD RMPREAD instruction.
Improved EVEX decoding, including the new U bit.
Fixed ENTER & LEAVE operands.
 2024-09-16 12:23:54 +03:00
vlutas
c877b5007f
Merge pull request #96 from turol/optimize 
Optimizations
 2024-08-29 17:38:46 +03:00
Turo Lamminen
56bbcca4cf Replace ND_SIGN_EX with less branchy version 2024-08-29 17:25:45 +03:00
Andrei KISARI
68166adcbd Add support for builds without mnemonics. 2024-08-28 10:18:10 +03:00
Andrei Vlad LUTAS
f1a85df2e7 Use const cast when fetching bytes from memory. 2024-05-29 09:05:56 +03:00
Andrei Vlad LUTAS
a86c84f599 Added missing paranthesis around macro parameter. 2024-05-28 23:19:20 +03:00
Andrei Vlad LUTAS
91f04ed43b Fixed potential unaligned load, as reported by UBSAN. 2024-05-28 19:20:38 +03:00
Andrei Vlad LUTAS
05d5632dea https://github.com/bitdefender/bddisasm/issues/89 - fixed comment. 2024-05-07 17:03:07 +03:00
Andrei Vlad LUTAS
fad9c7e35c BDDISASM v2.1.0 release - please consult the CHANGELOG for details about the modifications. 2024-02-20 13:39:22 +02:00