mirror of
https://github.com/trezor/trezor-firmware.git
synced 2024-12-18 20:38:10 +00:00
54 lines
1.6 KiB
C
54 lines
1.6 KiB
C
#include <stdint.h>
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#include "common.h"
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#include "rng.h"
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#include STM32_HAL_H
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// reference RM0090 section 35.12.1 Figure 413
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#define USB_OTG_HS_DATA_FIFO_RAM (USB_OTG_HS_PERIPH_BASE + 0x20000U)
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#define USB_OTG_HS_DATA_FIFO_SIZE (4096U)
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void clear_otg_hs_memory(void)
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{
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RCC->AHB1ENR |= RCC_AHB1ENR_OTGHSEN; // enable USB_OTG_HS peripheral clock so that the peripheral memory is accessible
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const uint32_t unpredictable = rng_get();
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memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), unpredictable);
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memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), 0);
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RCC->AHB1ENR &= ~RCC_AHB1ENR_OTGHSEN; // disable USB OTG_HS peripheral clock as the peripheral is not needed right now
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}
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#define WANTED_WRP (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
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#define WANTED_RDP (OB_RDP_LEVEL_2)
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#define WANTED_BOR (OB_BOR_LEVEL3)
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void flash_set_option_bytes(void)
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{
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FLASH_OBProgramInitTypeDef opts;
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HAL_FLASHEx_OBGetConfig(&opts);
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opts.OptionType = 0;
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if (opts.WRPSector != WANTED_WRP) {
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opts.OptionType = OPTIONBYTE_WRP;
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opts.WRPState = OB_WRPSTATE_ENABLE;
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opts.WRPSector = WANTED_WRP;
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opts.Banks = FLASH_BANK_1;
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}
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if (opts.RDPLevel != WANTED_RDP) {
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opts.OptionType = OPTIONBYTE_RDP;
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opts.RDPLevel = WANTED_RDP;
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}
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if (opts.BORLevel != WANTED_BOR) {
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opts.OptionType = OPTIONBYTE_BOR;
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opts.BORLevel = WANTED_BOR;
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}
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if (opts.OptionType != 0) {
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HAL_FLASHEx_OBProgram(&opts);
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}
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}
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