Martin Milata 20fe8552ca build(core/rust): use correct architecture for T1 ... TT is Cortex-M4 is Armv7E-M while T1 is Cortex-M3 is Armv7-M: https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv6-m-vs-armv7-m---unpacking-the-microcontrollers		2021-05-21 13:49:42 +02:00
..
.cargo	feat(core): Add Rust bindings to MicroPython and trezorhal	2021-05-05 16:00:21 +02:00
src	build(core/rust): disable nightly-only features	2021-05-21 13:42:10 +02:00
build.rs	build(core/rust): use correct architecture for T1	2021-05-21 13:49:42 +02:00
Cargo.lock	build(core/rust): disable nightly-only features	2021-05-21 13:42:10 +02:00
Cargo.toml	build(core/rust): disable nightly-only features	2021-05-21 13:42:10 +02:00
micropython.h	feat(core): Add Rust bindings to MicroPython and trezorhal	2021-05-05 16:00:21 +02:00
qstr.h	feat(core): Add Rust bindings to MicroPython and trezorhal	2021-05-05 16:00:21 +02:00
rustfmt.toml	feat(core): Add Rust bindings to MicroPython and trezorhal	2021-05-05 16:00:21 +02:00