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b4eaf7dbaf
Every 4294967295 milliseconds (2 ^ 32 - 1), system_millis will overflow. This means that every 49.71 days, system_millis will reset to zero. Comparisons like `system_millis < (system_millis + 1)` would fail if the latter had overflown and the former had not. This is non-critical because the worst case is that one second could be skipped or the screen could lock early. This poses no threat to the exponential backoff used for protection against brute force.
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/*
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* This file is part of the TREZOR project.
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*
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* Copyright (C) 2016 Saleem Rashid <trezor@saleemrashid.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "timer.h"
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/cm3/systick.h>
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/* 1 tick = 1 ms */
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volatile uint32_t system_millis;
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/* Screen timeout */
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uint32_t system_millis_lock_start;
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/*
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* Initialise the Cortex-M3 SysTick timer
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*/
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void timer_init(void) {
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system_millis = 0;
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/*
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* MCU clock (120 MHz) as source
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*
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* (120 MHz / 8) = 15 clock pulses
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*
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*/
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systick_set_clocksource(STK_CSR_CLKSOURCE_AHB_DIV8);
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STK_CVR = 0;
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/*
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* 1 tick = 1 ms @ 120 MHz
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*
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* (15 clock pulses * 1000 ms) = 15000 clock pulses
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*
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* Send an interrupt every (N - 1) clock pulses
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*/
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systick_set_reload(14999);
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/* SysTick as interrupt */
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systick_interrupt_enable();
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systick_counter_enable();
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}
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void sys_tick_handler(void) {
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system_millis++;
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}
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