tychovrahe b0dd521c5d fix(core): separate bootargs from kernel/aux SRAM ... [no changelog]		2024-11-20 11:17:35 +01:00
..
boards	feat(core): add support for SBU on T3W1	2024-11-20 11:17:35 +01:00
bootloaders	chore(core): add signed bootloader 2.1.9 for T3T1	2024-11-04 12:17:31 +01:00
vendorheader	refactor(core): move vendor headers to model specific directories	2024-07-16 15:56:28 +02:00
background_T3T1.h	chore(core): add TS5 background image for emulator	2024-07-12 15:38:33 +02:00
background_T3T1.jpg	chore(core): add TS5 background image for emulator	2024-07-12 15:38:33 +02:00
Clocks_T3T1_revE.md	refactor(core): reorganize model-specific files in embed/models	2024-05-21 19:01:31 +02:00
memory.ld	fix(core): separate bootargs from kernel/aux SRAM	2024-11-20 11:17:35 +01:00
model_T3T1.h	fix(core): separate bootargs from kernel/aux SRAM	2024-11-20 11:17:35 +01:00
versions.h	chore(core): bump monotonic versions	2024-09-03 13:07:34 +02:00