5 Commits

Author	SHA1	Message	Date
Martin Milata	dadff32f39	build(core): use internal model names everywhere ... TREZOR_MODEL=T and TREZOR_MODEL=R no longer work, please use TREZOR_MODEL=T2T1 and TREZOR_MODEL=T2B1 [no changelog]	2025-01-13 16:24:35 +01:00
tychovrahe	b0dd521c5d	fix(core): separate bootargs from kernel/aux SRAM ... [no changelog]	2024-11-20 11:17:35 +01:00
tychovrahe	b4c95f4c16	fix(core): fix systick frequency computation by utilizing HSE_VALUE properly ... [no changelog]	2024-11-20 11:17:35 +01:00
tychovrahe	bbf97c7141	fix(core): fix clock setting on U5 for 32 MHz HSE ... [no changelog]	2024-11-20 11:17:35 +01:00
cepetr	089db2cadf	refactor(core): restructure embed folder ... [no changelog]	2024-11-18 09:41:02 +01:00