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mirror of https://github.com/trezor/trezor-firmware.git synced 2024-12-26 16:18:22 +00:00
Commit Graph

714 Commits

Author SHA1 Message Date
matejcik
806beb77d2 feat(core/rust): improve catch_exception, make use of Rust 1.55 2021-09-21 12:43:31 +02:00
matejcik
795ed2d339 fix(core/rust): fix "unnecessary unsafe" warning
[no changelog]
2021-09-21 12:43:31 +02:00
matejcik
31de21718f feat(core/rust): introduce Obj.is_null()
[no changelog]
2021-09-21 12:43:31 +02:00
matejcik
b666895303 feat(core/rust): catch, handle and propagate uPy exceptions 2021-09-21 12:43:31 +02:00
matejcik
8abcb6f8cc chore(core/rust): allow unused macros
[no changelog]
2021-09-21 12:43:31 +02:00
Jan Pochyla
7c65f0357a feat(core/rust): Implement exception catching in Rust
chore(core): Add test for Rust exc catching

chore(core): Document exception catching in Rust

[no changelog]
2021-09-21 12:43:31 +02:00
Martin Milata
a007e062ab style(core): apply rustfmt
[no changelog]
2021-09-16 14:57:06 +02:00
Martin Milata
582e1318c4 feat(core/emulator): support protobuf messages in memory dumps
[no changelog]
2021-07-22 13:31:11 +02:00
Pavol Rusnak
8cfa5da1ce
docs: fix typos in comments
[skip_ci]
2021-06-30 15:41:55 +02:00
matejcik
c06a93cba5 feat(core/rust): propagate bitcoin_only flag to Rust build 2021-06-08 09:55:19 +02:00
Jan Pochyla
8a21e3fc73 feat(core): Add Rust Protobuf codec 2021-06-08 09:55:19 +02:00
Martin Milata
20fe8552ca build(core/rust): use correct architecture for T1
TT is Cortex-M4 is Armv7E-M while T1 is Cortex-M3 is Armv7-M:
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv6-m-vs-armv7-m---unpacking-the-microcontrollers
2021-05-21 13:49:42 +02:00
matejcik
e015bc0856 build(core/rust): disable nightly-only features
When we need them, we will re-enable.
2021-05-21 13:42:10 +02:00
Jan Pochyla
6257584951 feat(core): Add Rust bindings to MicroPython and trezorhal
core: Remove dangling module decls

core: Use new Cargo feature resolver, use external MacOS debug info

core: Rust docs improvements

core: Upgrade bindgen

core: Add test target to Rust

ci: build rust sources

build(core): .ARM.exidx.text.__aeabi_ui2f in t1 firmware size

It's an unwind table for softfloat function inserted by rustc, probably
can be removed to save 8 bytes:
599c58db70/link.x.in (L175-L182)

scons: Remove dead code

core: Move Rust target to build/rust

core: Replace extern with a FFI version

core: Add some explanatory Rust comments

core: Use correct path for the Rust lib

core: Remove Buffer::as_mut()

Mutable buffer access needs MP_BUFFER_WRITE flag. TBD in the Protobuf PR.

core: Improve docs for micropython::Buffer

core: Minor Rust docs changes

core: Rewrite trezor_obj_get_ll_checked

core: Fix incorrect doc comment

core: Remove cc from deps

fixup! core: Rewrite trezor_obj_get_ll_checked

core: update safety comments
2021-05-05 16:00:21 +02:00